LC66P408 Ver la hoja de datos (PDF) - SANYO -> Panasonic
Número de pieza
componentes Descripción
Fabricante
LC66P408 Datasheet PDF : 14 Pages
| |||
Pin Function
Number
DIP42S
QIP48E
1
44
2
45
3
46
4
47
5
48
6
1
7
2
8
3
9
4
10
5
11
7
12
8
13
9
14
10
15
11
16
12
17
13
18
14
24
22
25
23
19
15
20
16
21
17
22
20
23
21
26
24
27
25
28
26
29
27
30
28
31
29
32
31
33
32
34
33
35
34
36
35
37
36
38
37
39
38
40
39
41
40
42
41
–
6, 18, 19, 30,
42, 43
LC66P408
Name
D0/P00
D1/P01
D2/P02
D3/P03
D4/P10
D5/P11
D6/P12
D7/P13
A0/SI0/P20
A1/SO0/P21
A2/SCK0/P22
A3/INT0/P23
A4/INT1/P30
A5/POUT0/P31
A6/POUT1/P32
HOLD/P33
A7/P40
A8/P41
A9/P42
A10/P43
VPP/TEST
VSS
OSC1
OSC2
RES
A11/P50
A12/P51
A13/P52
INT2/P53
SI1/P60
SO1/P61
SCK1/P62
DASEC/PIN1/P63
PC2
PC3
AN1/PD0
AN2/PD1
AN3/PD2
AN4/PD3/PGM
VDD
AN5/PE0/CE
AN6/PE1/OE
NC
Description
Multiplexed 4-bit input/output port P0 (P00 to P03) and PROM data bus
lines (D0 to D3)
Multiplexed 4-bit input/output port P1 (P10 to P13) and PROM data bus
lines (D4 to D7)
Multiplexed 4-bit input/output port P2 (P20 to P23), serial input 0 (SI0), serial
output 0 (SO0), serial clock 0 (SCK0), Interrupt request 0 (INT0) and PROM
address bus lines (A0 to A3)
Multiplexed 3-bit input/output port P3 (P30 to P32), interrupt request 1 (INT1),
timer outputs (POUT0 and POUT1) and PROM address bus lines (A4 to A6)
Multiplexed single-bit input port (P33) and hold-mode control input (HOLD)
Multiplexed 4-bit input/output port P4 (P40 to P43) and PROM address bus
lines (A7 to A10)
CPU test input
Ground
External oscillator connections
Reset input
Multiplexed 4-bit input/output port P5 (P50 to P53), interrupt request 2 (INT2)
and PROM address bus lines (A11 to A13)
Multiplexed 4-bit input/output port P6 (P60 to P63), serial input 1 (SI1), serial
output 1 (SO1), serial clock 1 (SCK1), event counter input (PIN1) and PROM
data security control input (DASEC)
2-bit input/output port PC
Multiplexed 4-bit input port PD (PD0 to PD3), PROM program control input
(PGM) and analog-to-digital converter inputs (AN1 to AN4)
5 V supply
Multiplexed 2-bit input port PE (PE0 to PE1), PROM chip enable (CE) and
output enable (OE), and analog-to-digital converter inputs (AN5 and AN6)
No connection
No.3492–3/14
Share Link: 