CL7128A Ver la hoja de datos (PDF) - Clear Logic
Número de pieza
componentes Descripción
Fabricante
CL7128A Datasheet PDF : 14 Pages
| |||
CL7128A and CL7128AE Laser Processed Logic Devices
AC Electrical Specifications cont.
External Timing Parameters
Speed: -7
Symbol
Parameter
Conditions Min Max
tPD1 Input to non-registered output
CL = 35 pF
7.5
tPD2 I/O input to non-registered output
CL = 35 pF
7.5
tSU Global clock setup time
4.9
tH
Global clock hold time
0.0
tFSU Global clock setup time of fast input
3.0
tFH Global clock hold time of fast input
0.0
tCO1 Global clock to output delay
CL = 35 pF
1.0 4.5
tCH Global clock high time
3.0
tCL Global clock low time
3.0
tASU Array clock setup time
1.6
tAH Array clock hold time
2.1
tACO1 Array clock to output delay
CL = 35 pF
7.8
tACH Array clock high time
3.0
tACL Array clock low time
3.0
tCNT Minimum global clock period
8.4
fCNT Max. internal global clock frequency
119.0
tACNT Minimum array clock period
8.4
fACNT Max. internal array clock frequency
119.0
Speed: -10
Min Max
10.0
10.0
6.6
0.0
3.0
0.0
1.0 5.9
4.0
4.0
2.1
3.4
10.4
4.0
4.0
11.2
89.3
11.2
89.3
Speed: -12
Min Max Unit
12.0 ns
12.0 ns
7.8
ns
0.0
ns
3.0
ns
0.0
ns
1.0 7.1 ns
5.0
ns
5.0
ns
2.4
ns
4.4
ns
12.5 ns
5.0
ns
5.0
ns
13.3 ns
75.2
MHz
13.3 ns
75.2
MHz
7KA tbl 06A2
Page 9
Share Link: 