HI1175JCPZ Ver la hoja de datos (PDF) - Intersil

Número de pieza

componentes Descripción

Fabricante

HI1175JCPZ

8-Bit, 20 MSPS, Flash A/D Converter

Intersil 

HI1175

Detailed Description

The HI1175 is a 2-step A/D converter featuring a 4-bit upper

comparator group and two lower comparator groups of 4 bits

each. The reference voltage can be obtained from the

onboard bias generator or be supplied externally. This IC

uses an offset canceling type comparator that operates syn-

chronously with an external clock. The operating modes of

the part are input sampling (S), hold (H), and compare (C).

The operation of the part is illustrated in Figure 2. A

reference voltage that is between VRT-VRB is constantly

applied to the upper 4-bit comparator group. VI(1) is sam-

pled with the falling edge of the first clock by the upper com-

parator block. The lower block A also samples VI(1) on the

same edge. The upper comparator block finalizes compari-

son data MD(1) with the rising edge of the first clock. Simul-

taneously the reference supply generates a reference

voltage RV(1) that corresponds to the upper results and

applies it to the lower comparator block A. The lower com-

parator block finalizes comparison data LD(1) with the rising

edge of the second clock. MD(1) and LD(1) are combined

and output as OUT(1) with the rising edge of the third clock.

There is a 2.5 cycle clock delay from the analog input sam-

pling point to the corresponding digital output data. Notice

how the lower comparator blocks A and B alternate generat-

ing the lower data in order to increase the overall A/D sam-

pling rate.

Power, Grounding, and Decoupling

To reduce noise effects, separate the analog and digital

grounds.

In order to avoid latchup at power up, it is necessary that

AVDD and DVDD be driven from the same supply.

Bypass both the digital and analog VDD pins to their respec-

tive grounds with a ceramic 0.1µF capacitor close to the pin.

Analog Input

The input capacitance is small when compared with other

flash type A/D converters. However, it is necessary to drive

the input with an amplifier with sufficient bandwidth and drive

capability. In order to prevent parasitic oscillation, it may be

necessary to insert a low value (i.e., 0.24Ω) resistor between

the output of the amplifier and the A/D input.

Reference Input

The range of the A/D is set by the voltage between VRT and

VRB. The internal bias generator will set VRTS to 2.6V and

VRBS to 0.6V. These can be used as the part reference by

shorting VRT and VRTS and VRB to VRBS. The analog input

range of the A/D will now be from 0.6V to 2.6V and is

referred to as Self Bias Mode 1. Self Bias Mode 2 is where

VRB is connected to AGND and VRT is shorted to VRTS. The

analog input range will now be from 0V to 2.4V.

Test Circuits

+V

S2

-

S1 : ON IF A < B

+

S1

S2 : ON IF A > B

-V

A<B A>B

VIN

DUT

HI1175

DVM

COMPARATOR

8

8

A8

B8

TO TO

A1

B1

A0

“0”

B0

“1”

CLK (20MHz)

CONTROLLER

BUFFER

000 • • • 00

8

TO

111 • • • 10

FIGURE 21. INTEGRAL AND DIFFERENTIAL NON-LINEARITY ERROR AND OFFSET VOLTAGE TEST CIRCUIT

4-1078

Share Link: