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SSL4101T Ver la hoja de datos (PDF) - NXP Semiconductors.

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SSL4101T
NXP
NXP Semiconductors. NXP
SSL4101T Datasheet PDF : 29 Pages
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NXP Semiconductors
SSL4101T
GreenChip III+ SMPS control IC
S1
RSS1
CSS1
RSENSE1
Istartup(soft)PFC 60 μA
SOFT START
CONTROL
11
PFCSENSE
OCP
0.5 V
Fig 5. Soft start-up of PFC
014aaa157
7.2.6 Low power mode
When the output power of the flyback converter (see Section 7.3) is low, the flyback
converter switches over to frequency reduction mode. When frequency reduction mode is
entered by the flyback controller, the power factor correction circuit is switched off to
maintain high efficiency.
During low power mode operation the PFCCOMP pin is clamped to a minimal voltage of
2.7 V (typical) and a maximum voltage of 3.9 V (typical). The lower clamp voltage limits
the maximum power that is delivered when the PFC is switched on again. The upper
clamp voltage ensures that the PFC can return to its normal regulation point in a limited
amount of time when returning from low power mode.
As soon as the flyback converter leaves the frequency reduction mode, the power factor
correction circuit restores normal operation. To prevent continuous switching on and off of
the PFC circuit, a small hysteresis is build in, (60 mV (typical) on the FBCTRL pin).
7.2.7 Overcurrent protection (PFCSENSE pin)
The maximum peak current is limited cycle-by-cycle by sensing the voltage across an
external sense resistor, RSENSE1, on the source of the external MOSFET. The voltage is
measured via the PFCSENSE pin.
7.2.8 Mains undervoltage lockout/brownout protection (VINSENSE pin)
To prevent the PFC from operating at very low mains input voltages, the voltage on the
VINSENSE pin is sensed continuously. As soon as the voltage on this pin drops below the
Vstop(VINSENSE) level, switching of the PFC is stopped.
The voltage on pin VINSENSE is clamped to a minimum value,
Vstart(VINSENSE) + ΔVpu(VINSENSE), for a fast restart as soon as the mains input voltage is
restored after a mains dropout.
SSL4101T
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 21 April 2011
© NXP B.V. 2011. All rights reserved.
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