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RMBA09500-58 Ver la hoja de datos (PDF) - Raytheon Company

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RMBA09500-58 Datasheet PDF : 5 Pages
1 2 3 4 5
RMBA09500-58 - Cellular 2 Watt Linear GaAs
RF Components MMIC Power Amplifier
Application
Information
PRODUCT INFORMATION
CAUTION: THIS IS AN ESD SENSITIVE DEVICE.
The following describes a procedure for evaluating the RMBA09500-58, a monolithic high efficiency
power amplifier, in a surface mount package, designed for use as a driver stage for Cellular base
stations, or as the final output stage for Micro- and Pico-Cell base stations. Figure 1 shows the package
outline and the pin designations. Figure 2 shows the functional block diagram of the packaged product.
The RMBA09500-58 requires external passive components for DC bias and RF input and output
matching circuits as shown in Figure 3 and the Parts List. A recommended schematic circuit is shown in
Figure 3. The gate biases for the two stages of the amplifier may be set by simple resistive voltage
dividers. Figure 4 shows a typical layout of an evaluation board, corresponding to the schematic circuits
of figure 3. The following designations should be noted:
(1) Pin designations are as shown in figure 2.
(2) Vg1 and Vg2 are the Gate Voltages (negative)
applied at the pins of the package
(3) Vgg1 and Vgg2 are the negative supply
voltages at the evaluation board terminals
(4) Vd1 and Vd2 are the Drain Voltages (positive)
applied at the pins of the package
(5) Vdd1 and Vdd2 are the positive supply
voltages at the evaluation board terminals
Note: The 2 terminals of Vdd1 and Vdd2 may be
tied together.
The base of the package must be soldered on to a
heat sink for proper operation.
Test Procedure
for the evaluation board
(RMBA09500-58-TB)
CAUTION: LOSS OF GATE VOLTAGES (VG1, VG2) WHILE CORRESPONDING DRAIN VOLTAGES
(Vdd) ARE PRESENT CAN DAMAGE THE AMPLIFIER.
The following sequence must be followed to properly test the amplifier. (It is necessary to add a fan to
provide air cooling across the heat sink of RMBA09500.) Note: Vdd1, 2 are tied together.
Step 1: Turn off RF input power.
Step 2: Use GND terminal of the evaluation board
for the ground of the DC supplies. Slowly
apply gate supply voltages as specified on
results sheet supplied with test board to
the board terminals Vgg1 and Vgg2.
Step 3: Slowly apply drain supply voltages of
+7.0 V to the board terminals Vdd1, 2.
Adjust Vgg to set the total quiescent
current (with no RF applied) Idq as per
supplied result sheet. [Gate supply
voltages (Vgg i.e., Vgg1, Vgg2) may be
adjusted, only if quiescent current (Idq1
and Idq2) values desired are different
from those noted on the data summary
supplied with product samples].
Step 4: After the bias condition is established,
RF input signal may now be applied at the
appropriate frequency band and
appropriate power level.
Step 5: Follow turn-off sequence of:
(i) Turn off RF Input Power
(ii) Turn down and off drain voltages
Vdd1, 2.
(iii) Turn down and off gate voltages Vgg1
and Vgg2.
www.raytheonrf.com
Specifications are based on most current or latest revision.
Revised June 27, 2003
Page 2
Raytheon RF Components
362 Lowell Street
Andover, MA 01810

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