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74LV04PW,112(2015) Ver la hoja de datos (PDF) - NXP Semiconductors.

Número de pieza
componentes Descripción
Fabricante
74LV04PW,112
(Rev.:2015)
NXP
NXP Semiconductors. NXP
74LV04PW,112 Datasheet PDF : 15 Pages
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74LV04
Hex inverter
Rev. 4 — 8 December 2015
Product data sheet
1. General description
The 74LV04 is a low-voltage Si-gate CMOS device that is pin and function compatible with
74HC04 and 74HCT04.
The 74LV04 provides six inverting buffers.
2. Features and benefits
Wide operating voltage: 1.0 V to 5.5 V
Optimized for low voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 C
Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
Tamb = 25 C
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
74LV04D
40 C to +125 C SO14
plastic small outline package; 14 leads;
body width 3.9 mm
74LV04DB
40 C to +125 C SSOP14
plastic shrink small outline package; 14 leads;
body width 5.3 mm
74LV04PW
40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
74LV04BQ
40 C to +125 C
DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
Version
SOT108-1
SOT337-1
SOT402-1
SOT762-1

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