CAT28C257 Ver la hoja de datos (PDF) - ON Semiconductor
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CAT28C257 Datasheet PDF : 13 Pages
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CAT28C257
Page Write
The page write mode of the CAT28C257 (essentially an
extended BYTE WRITE mode) allows from 1 to 128 bytes
of data to be programmed within a single EEPROM write
cycle. This effectively reduces the byte−write time by a
factor of 128.
Following an initial WRITE operation (WE pulsed low,
for tWP, and then high) the page write mode can begin by
issuing sequential WE pulses, which load the address and
data bytes into a 128 byte temporary buffer. The page
address where data is to be written, specified by bits A7 to
A14, is latched on the last falling edge of WE. Each byte
within the page is defined by address bits A0 to A6 (which
can be loaded in any order) during the first and subsequent
write cycles. Each successive byte load cycle must begin
within tBLC MAX of the falling edge of the preceding WE
pulse. There is no page write window limitation as long as
WE is pulsed low within tBLC MAX.
Upon completion of the page write sequence, WE must
stay high a minimum of tBLC MAX for the internal automatic
program cycle to commence. This programming cycle
consists of an erase cycle, which erases any data that existed
in each addressed cell, and a write cycle, which writes new
data back into the cell. A page write will only write data to
the locations that were addressed and will not rewrite the
entire page.
tWC
ADDRESS
tAS
CE
tAH
tCW
tBLC
tOEH
OE
tOES
tCS
tCH
WE
DATA OUT
HIGH−Z
DATA IN
DATA VALID
tDS
tDH
Figure 6. Byte Write Cycle [CE Controlled]
OE
CE
tWP
tBLC
WE
ADDRESS
I/O
BYTE 0 BYTE 1 BYTE 2
BYTE n
Figure 7. Page Mode Write Cycle
BYTE n+1
tWC
LAST BYTE
BYTE n+2
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