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74VHCT08ATTR

QUAD 2-INPUT AND GATE

STMicroelectronics 

74VHCT08A

QUAD 2-INPUT AND GATE

s HIGH SPEED: tPD = 4.7 ns (TYP.) at VCC = 5V

s LOW POWER DISSIPATION:

ICC = 2 µA (MAX.) at TA=25°C

s COMPATIBLE WITH TTL OUTPUTS:

VIH = 2V (MIN.), VIL = 0.8V (MAX)

s POWER DOWN PROTECTION ON INPUTS

& OUTPUTS

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 8 mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s OPERATING VOLTAGE RANGE:

VCC(OPR) = 4.5V to 5.5V

s PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 08

s IMPROVED LATCH-UP IMMUNITY

s LOW NOISE: VOLP = 0.8V (MAX.)

DESCRIPTION

The 74VHCT08A is an advanced high-speed

CMOS QUAD 2-INPUT AND GATE fabricated

with sub-micron silicon gate and double-layer

metal wiring C2MOS technology.

The internal circuit is composed of 2 stages

including buffer output, which provides high noise

immunity and stable output.

SOP

TSSOP

Table 1: Order Codes

PACKAGE

SOP

TSSOP

T&R

74VHCT08AMTR

74VHCT08ATTR

Power down protection is provided on all inputs

and outputs and 0 to 7V can be accepted on

inputs with no regard to the supply voltage. This

device can be used to interface 5V to 3V since all

inputs are equipped with TTL threshold.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

Figure 1: Pin Connection And IEC Logic Symbols

December 2004

Rev. 4

1/11

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