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STV9423

MULTISYNC ON-SCREEN DISPLAY FOR MONITOR

STMicroelectronics 

STV9422 - STV9424

FUNCTIONAL DESCRIPTION

The STV9422/24 display processor operation is

controlled by a host MCU via the I2C interface. It is

fully programmable through 16 internal read/write

registers (8 for STV9424) and performs all the

display functions by generating pixels from data

stored in its internal memory. After the page down-

loading from the MCU, the STV9422/24 refreshes

screen by its built in processor, without any MCU

control (access).In addition, the host MCU has a

direct access to the on chip 1Kbytes RAM during

the display of the current page to make any update

of its contents.

With the STV9422/24, a page displayed on the

screen is made of several strips which can be of 2

types : spacing or character and which are de-

scribed by a table of descriptors and character

codes in RAM. Several pages can be downloaded

at the same time in the RAM and the choice of the

current display page is made by programming the

CONTROL register.

I - Serial Interface

The 2-wires serial interface is an I2C interface. To

be connected to the I2C bus, a device must own its

slave address ; the slave address of the

STV9422/24 is BA (in hexadecimal).

A6 A5 A4 A3 A2 A1 A0 R/W

1

0

1

1

1

0

1

Figure 3 : STV9422/I2C Write Operation

I.1 - Data Transfer in Write Mode

The host MCU can write data into the STV9422/24

registers or RAM.

To write data into the STV9422/24, after a start, the

MCU must send (Figure 3) :

- First, the I2C address slave byte with a low level

for the R/W bit,

- The two bytes of the internal address where the

MCU wants to write data(s),

- The successive bytes of data(s).

All bytes are sent MS bit first and the write data

transfer is closed by a stop.

I.2 - Data Transfer in Read Mode

The host MCU can read data from the STV9422/24

registers, RAM or ROM.

To read data from the STV9422/24 (Figure 4), the

MCU must send 2 different I2C sequences.

The first one is made of I2C slave address byte with

R/W bit at low level and the 2 internal address

bytes.

The second one is made of I2C slave address byte

with R/W bit at high level and all the successive

data bytes read at successive addresses starting

from the initial address given by the first sequence.

SCL

SDA

Start

I2C Slave Address

R/W

A7 A6 A5 A4 A3 A2 A1 A0

- - A13 A12 A11 A10 A9 A8

ACK

LSB Address

ACK

MSB Address

ACK

SCL

SDA D7 D6 D5 D4 D3 D2 D1 D0

D7 D6 D5 D4 D3 D2 D1 D0

Data Byte 1

ACK

Data Byte 2

ACK

D7 D6 D5 D4 D3 D2 D1 D0

Data Byte n

ACK

Stop

Figure 4 : STV9422/I2C Read Operation

SCL

SDA

Start

I1C Slave Address

R/W

A7 A6 A5 A4 A3 A2 A1 A0

- - A13 A12 A10 A10 A9 A8

ACK

LSB Address

ACK

MSB Address

ACK

Stop

SCL

SDA

Start

R/W

I1C Slave Address

D7 D6 D5 D4 D3 D2 D1 D0

D7 D6 D5 D4 D3 D2 D1 D0

ACK

Data Byte 1

ACK

Data Byte n

ACK

Stop

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