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CXD3003R Ver la hoja de datos (PDF) - Sony Semiconductor

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CXD3003R Datasheet PDF : 137 Pages
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CXD3003R
Pin Description
Pin Symbol
I/O
No.
Description
3 SE
I
Sled error signal input.
4 FE
I
Focus error signal input.
5 VC
I
Center voltage input.
6 VPCO1 O 1, Z, 0 Wide-band EFM PLL VCO2 charge pump output.
7
VPCO2
O
1, Z, 0
Wide-band EFM PLL VCO2 charge pump output 2. Turned on and off by $E
command FCSW.
8 VCTL
I
Wide-band EFM PLL VCO2 control voltage input.
9 FILO
O Analog Master PLL filter output (slave = digital PLL).
10 FILI
I
Master PLL filter input.
11 PCO
O 1, Z, 0 Master PLL charge pump output.
12 CLTV
I
Multiplier VCO control voltage input.
13 AVSS1
Analog GND.
14 RFAC I
EFM signal input.
15 BIAS
I
Asymmetry circuit constant current input.
16 ASYI
I
Asymmetry comparator voltage input.
17 ASYO O 1, 0 EFM full-swing output (low = VSS, high = VDD).
18 AVDD1
Analog power supply.
20 DVDD1
Digital power supply.
21 DVSS1
Digital GND.
22 ASYE I
Asymmetry circuit on/off (low = off, high = on).
23 PSSL
I
Audio data output mode switching input (low: serial, high: parallel).
24 WDCK O 1, 0 D/A interface for 48-bit slot. Word clock f = 2Fs.
25 LRCK O 1, 0 D/A interface for 48-bit slot. LR clock f = Fs.
26 LRCKI I
LR clock input to DAC (48-bit slot).
27 DA16
O
1, 0
DA16 (MSB) output when PSSL = 1, 48-bit slot serial data output (two's
complement, MSB first) when PSSL = 0.
28 PCMDI I
Audio data input to DAC (48-bit slot).
29 DA15 O 1, 0 DA15 output when PSSL = 1, 48-bit slot bit clock output when PSSL = 0.
30 BCKI
I
Bit clock input to DAC (48-bit slot).
31 DA14
O
1, 0
DA14 output when PSSL = 1, 64-bit slot serial data output (two's
complement, LSB first) when PSSL = 0.
32 DA13 O 1, 0 DA13 output when PSSL = 1, 64-bit slot bit clock output when PSSL = 0.
33 DA12 O 1, 0 DA12 output when PSSL = 1, 64-bit slot LR clock output when PSSL = 0.
34 DA11 O 1, 0 DA11 output when PSSL = 1, GTOP output when PSSL = 0.
39 DA10 O 1, 0 DA10 output when PSSL = 1, XUGF output when PSSL = 0.
40 DA09 O 1, 0 DA09 output when PSSL = 1, XPLCK output when PSSL = 0.
–5–

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