CXD2597Q Ver la hoja de datos (PDF) - Sony Semiconductor
Número de pieza
componentes Descripción
Fabricante
CXD2597Q Datasheet PDF : 115 Pages
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CXD2597Q
Pin
No.
Symbol
72 LOUT1
73 AVSS1
74 AVSS2
75 LOUT2
76 AIN2
77 AOUT2
78 AVDD2
79 RMUT
80 LMUT
I/O
O
——
——
O
I
O
——
O 1, 0
O 1, 0
Description
L ch LINE output.
Analog GND.
Analog GND.
R ch LINE output.
R ch operational amplifier output.
R ch analog output.
Analog power supply.
R ch zero detection flag.
L ch zero detection flag.
Notes) • PCMD is a MSB first, two's complement output.
• GTOP is used to monitor the frame sync protection status. (High: sync protection window opens.)
• XUGF is the frame sync obtained from the EFM signal, and is negative pulse. It is the signal before
sync protection.
• XPCK is the inverse of the EFM PLL clock. The PLL is designed so that the falling edge and the
EFM signal transition point coincide.
• The GFS signal goes high when the frame sync and the insertion protection timing match.
• RFCK is derived from the crystal accuracy, and has a cycle of 136µs.
• C2PO represents the data error status.
• XROF is generated when the 16K RAM exceeds the ±4F jitter margin.
Monitor Pin Output Combinations
Command bit
MTSL1 MTSL0
Output data
0
0
XUGF XPCK GFS
0
1
MNT1 MNT0 MNT3
1
0
RFCK XPCK XROF
C2PO
C2PO
GTOP
–6–
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