DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

CXD2588R Ver la hoja de datos (PDF) - Sony Semiconductor

Número de pieza
componentes Descripción
Fabricante
CXD2588R Datasheet PDF : 121 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
CXD2588Q/R
Contents
§1. CPU Interface
§1-1. CPU Interface Timing ........................................................................................................................ 16
§1-2. CPU Interface Command Table ........................................................................................................ 16
§1-3. CPU Command Presets .................................................................................................................... 26
§1-4. Description of SENS Signals and Commands ................................................................................... 31
§2. Subcode Interface
§2-1. P to W Subcode Readout .................................................................................................................. 51
§2-2. 80-bit Sub Q Readout ........................................................................................................................ 51
§3. Description of Modes
§3-1. CLV-N Mode ...................................................................................................................................... 56
§3-2. CLV-W Mode ..................................................................................................................................... 56
§3-3. CAV-W Mode ..................................................................................................................................... 56
§4. Description of Other Functions
§4-1. Channel Clock Regeneration by the Digital PLL Circuit .................................................................... 58
§4-2. Frame Sync Protection ...................................................................................................................... 60
§4-3. Error Correction ................................................................................................................................. 60
§4-4. DA Interface ....................................................................................................................................... 61
§4-5. Digital Out .......................................................................................................................................... 63
§4-6. Servo Auto Sequence ....................................................................................................................... 63
§4-7. Digital CLV ......................................................................................................................................... 70
§4-8. CD-DSP Block Playback Speed ........................................................................................................ 71
§4-9. DAC Block Playback Speed .............................................................................................................. 71
§4-10. DAC Block Input Timing .................................................................................................................... 72
§4-11. Description of DAC Block Functions .................................................................................................. 72
§4-12. LPF Block .......................................................................................................................................... 76
§4-13. Asymmetry Compensation ................................................................................................................ 77
§4-14. CD Text Data Demodulation .............................................................................................................. 78
§5. Description of Servo Signal Processing System Functions and Commands
§5-1. General Description of Servo Signal Processing System .................................................................. 80
§5-2. Digital Servo Block Master Clock (MCK) ........................................................................................... 81
§5-3. AVRG Measurement and Compensation .......................................................................................... 81
§5-4. E:F Balance Adjustment Function ..................................................................................................... 83
§5-5. FCS Bias Adjustment Function .......................................................................................................... 83
§5-6. AGCNTL Function ............................................................................................................................. 85
§5-7. FCS Servo and FCS Search ............................................................................................................. 87
§5-8. TRK and SLD Servo Control ............................................................................................................. 88
§5-9. MIRR and DFCT Signal Generation .................................................................................................. 89
§5-10. DFCT Countermeasure Circuit .......................................................................................................... 90
§5-11. Anti-Shock Circuit .............................................................................................................................. 90
§5-12. Brake Circuit ...................................................................................................................................... 91
§5-13. COUT Signal ..................................................................................................................................... 92
§5-14. Serial Readout Circuit ........................................................................................................................ 92
§5-15. Writing to the Coefficient RAM .......................................................................................................... 93
§5-16. PWM Output ...................................................................................................................................... 93
§5-17. Servo Status Changes Produced by the LOCK Signal ..................................................................... 95
§5-18. Description of Commands and Data Sets ......................................................................................... 95
§5-19. List of Servo Filter Coefficients ........................................................................................................ 110
§5-20. Filter Composition ............................................................................................................................ 112
§5-21. TRACKING and FOCUS Frequency Response .............................................................................. 119
§6. Application Circuit .................................................................................................................................. 120
Explanation of abbreviations
AVRG: Average
AGCNTL: Auto gain control
FCS: Focus
TRK: Tracking
SLD: Sled
DFCT: Defect
– 15 –

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]