UPC4071G2(2000) Ver la hoja de datos (PDF) - NEC => Renesas Technology
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UPC4071G2 Datasheet PDF : 12 Pages
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µPC4071
ELECTRICAL CHARACTERISTICS (TA = 25°C, V± = ±15 V)
Parameter
Input Offset Voltage
Input Offset Current Note 7
Input Bias Current Note 7
Large Signal Voltage Gain
Supply Current
Common Mode Rejection Ratio
Supply Voltage Rejection Ratio
Output Voltage Swing
Common Model Input Voltage Range
Slew Rate
Unity Gain Frequency
Input Equivalent Noise Voltage
Input Equivalent Noise Voltage Density
Input Offset Voltage
Average VIO Temperature Drift
Input Offset CurrentNote 7
Input Bias CurrentNote 7
Symbol
Conditions
VIO
RS ≤ 50 Ω
IIO
IB
AV
RL ≥ 2 kΩ , VO = ±10 V
ICC
IO = 0 A
CMR
SVR
Vom
RL ≥ 10 kΩ
RL ≥ 2 kΩ
VICM
SR
AV = 1
funity
Vn
RS = 100 Ω, f = 10 Hz to 10 kHz
en
RS = 100 Ω, f = 1 kHz
VIO
RS ≤ 50 Ω, TA = –20 to +70°C
∆VIO/∆T TA = –20 to +70°C
IIO
TA = –20 to +70°C
IB
TA = –20 to +70°C
MIN.
25000
70
70
±12
±10
±10
TYP.
±3
±5
30
200000
2.0
86
86
±13.5
±12
13
3
4
18
±10
MAX.
±10
±50
200
2.7
±13
±2
7
Unit
mV
pA
pA
mA
dB
dB
V
V
V
V/µs
MHz
µVr.m.s.
nV/√Hz
mV
µV/°C
nA
nA
Notes 7. Input bias currents flow into IC. Because each currents are gate leak current of P-channel J-FET on input
stage. And that are temperature sensitive. Short time measuring method is recommendable to maintain the
junction temperature close to the operating ambient temperature.
Data Sheet G15204EJ4V0DS
3
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