CL3128ATC100-10 Ver la hoja de datos (PDF) - Clear Logic

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CL3128ATC100-10

Laser Processed Logic Device Family

Clear Logic 

CL3128A Laser Processed Logic Devices

u AN-12: CL7000 LPLD Timing and Function Compatability.

This document shows how a seamless conversion from CPLD

to ASIC can be achieve with no additional engineering with

Clear Logic.

Block Diagram

INPUT/GCLK1

INPUT/OE2/GCLK2

INPUT/OE1

INPUT/GCLRn

4 to 16 I/O Pins

4 to 16 I/O Pins

4 to 16 I/O Pins

4 to 16 I/O Pins

6 Output Enables

Block A

I/O

4 to 16

Macrocells

36

Control

1 - 16

Block

16

6

I/O

Control

Block

4 to 16

4 to 16

Block C

Macrocells

36

33 - 48

16

6

I/O

Control

Block

4 to 16

4 to 16

Block E

Macrocells

36

65 - 80

16

6

I/O

Control

Block

4 to 16

4 to 16

Block G

Macrocells

36

97 - 112

16

4 to 16

6 - 10 Output Enables

Block B

36

Macrocells

17 - 32

16

4 to 16 I/O

Control

Block

4 to 16 I/O Pins

4 to 16

6

Block D

36

Macrocells

49 - 64

16

4 to 16 I/O

Control

Block

4 to 16 I/O Pins

4 to 16

6

Block F

36

Macrocells

81 - 96

16

4 to 16 I/O

Control

Block

4 to 16 I/O Pins

4 to 16

6

Block H

36

Macrocells

4 to 16

I/O

113 - 128

Control

Block

16

4 to 16 I/O Pins

4 to 16

3128A drw 01

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