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SLA24C164-D/P(1999) Ver la hoja de datos (PDF) - Infineon Technologies

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SLA24C164-D/P Datasheet PDF : 27 Pages
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SLx 24C164/P
3
I2C-Bus Characteristics
The SLx 24C164/P devices support a master/slave bidirectional bus oriented protocol in
which the EEPROM always takes the role of a slave.
Master
SCL
SDA
Slave 1
Slave 5
Slave 2
Slave 6
Slave 3
Slave 7
VCC
Slave 4
Slave 8
VCC
IES02183
Figure 3
Bus Configuration
Master
Device that initiates the transfer of data and provides the clock for both
transmit and receive operations.
Slave
Device addressed by the master, capable of receiving and transmitting
data.
Transmitter The device with the SDA as output is defined as the transmitter. Due to
the open drain characteristic of the SDA output the device applying a low
level wins.
Receiver The device with the SDA as input is defined as the receiver.
Semiconductor Group
7
1998-07-27

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