SLA24C164-D/P(1999) Ver la hoja de datos (PDF) - Infineon Technologies

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SLA24C164-D/P
(Rev.:1999)

16 Kbit (2048 × 8 bit) Serial CMOS-EEPROM with I2C Synchronous 2-Wire Bus and Page Protection Mode™

Infineon Technologies 

SLx 24C164/P

Pin Description

Serial Clock (SCL)

The SCL input is used to clock data into the device on the rising edge and to clock data

out of the device on the falling edge.

Serial Data (SDA)

SDA is a bidirectional pin used to transfer addresses, data or control information into the

device or to transfer data out of the device. The output is open drain, performing a wired

AND function with any number of other open drain or open collector devices. The SDA

bus requires a pull-up resistor to VCC.

Chip Select (CS0, CS1, CS2)

The CS0, CS1 and CS2 pins are chip select inputs either hard wired or actively driven

to VCC or VSS. These inputs allow the selection of one of eight possible devices sharing

a common bus.

Write Protection (WP)

WP switched to VSS allows normal read/write operations.

WP switched to VCC protects the entire EEPROM against changes (hardware write

protection).

Additionally write protection is managed by a protection bit associated to each page.

(refer to chapter 7 Page Protection ModeTM)

Semiconductor Group

5

1998-07-27

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