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AD607 Ver la hoja de datos (PDF) - Analog Devices

Número de pieza
componentes Descripción
Fabricante
AD607
Low Power Mixer/AGC/RSSI 3 V Receiver IF Subsystem
AD
Analog Devices AD
AD607 Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD607
FL6082A
IEEE
RF_OUT
MOD_OUT
HP6633A
VPOS
IEEE
VNEG
SPOS
SNEG
DCPS
DP8200
VPOS
IEEE
VNEG
SPOS
SNEG
VREF
HP8112
IEEE PULSE_OUT
PULSE GENERATOR
HP8656B
IEEE
RF_OUT
SYNTHESIZER
HP6633A
VPOS
IEEE
VNEG
SPOS
SNEG
DCPS
FL6082A
IEEE
RF_OUT
MOD_OUT
HP6633A
VPOS
IEEE
VNEG
SPOS
SNEG
DCPS
DP8200
VPOS
IEEE
VREF
VNEG
SPOS
SNEG
50Ω
CHARACTERIZATION
BOARD
RFHI
LOIP
R
X
L
MXOP
IFHI
IFOP
DMIP
FDIN
PLL
IOUT
QOUT
VPOS
PRUP
GAIN
BIAS
P6205
X10
OUT IN1
FET PROBE
1103
OUT1
P6205
X10
OUT IN2
OUT2
FET PROBE
PROBE SUPPLY
HP54120
CH1
CH2
CH3
CH4
TRIG
IEEE_488
DIGITAL
OSCILLOSCOPE
NOTE: MUST BE 3 RESISTOR POWER DIVIDER
Figure 8. Power-Up Test Set
CHARACTERIZATION
BOARD
RFHI
LOIP
R
X
L
MXOP
IFHI
IFOP
DMIP
FDIN
PLL
IOUT
QOUT
VPOS
PRUP
GAIN
BIAS
P6205
1103
X10
OUT IN1
OUT1
R1
FET PROBE
1k
IN2
OUT2
PROBE SUPPLY
HP8594E
RF_IN
IEEE
SPEC AN
Figure 9. IF Output Impedance Test Set
CHARACTERIZATION
BOARD
RFHI
LOIP
R
X
L
MXOP
IFHI
20
dB
IFOP
DMIP
FDIN
PLL
IOUT
QOUT
VPOS
PRUP
GAIN
BIAS
P6205
1103
X10
OUT IN1
OUT1
FET PROBE
P6205
X10
OUT IN2
OUT2
FET PROBE PROBE SUPPLY
HP54120
CH1
CH2
CH3
CH4
TRIG
IEEE_488
DIGITAL
OSCILLOSCOPE
Figure 10. PLL Settling Time Test Set
–8–
REV. 0

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