CXA2112R Ver la hoja de datos (PDF) - Sony Semiconductor

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Fabricante

CXA2112R

LCD Driver

Sony Semiconductor 

CXA2112R

6. Dot Clock Phase Adjustment

The CXA2112R has phase adjustment function for input dot clock to achieve high precision and stable

operation.

High definition images with no jitter and flicker can be reproduced by this adjustment.

De-multiplexer operation timing is generated from the clock input to CLK_IN (Pin 59) and CLK_IN/ (Pin 61)

(ECL differential). By connecting CLK_OUT (Pin 54) and CLK_OUT/ (Pin 55) to CLK IN/, phase adjusted clock

can be used for its timing generation.

The CLOCK DELAY block is a PLL clock generator that uses MCLK (Pin 50) and MCLK/ (Pin 51) ECL

differential input clock as reference. The CLK_OUT polarity, inverted/non-inverted can be switched by high/low

of INV_CNT (Pin 52) input.

Also, in the DLY_CNT (Pin 49) input voltage range of 3 to 5V, CLK_OUT phase relative to MCLK can be

changed continuously 180deg. (PHDLY in the diagram below.)

It also has the advantage that an MCLK with noise can be shaped and used on the board.

MCLK

CLK_OUT

PHDLY

SH_IN

7. Usage of CXA2112R in 12-outputs

Two CXA2112Rs are required for 12-outputs, as shown in Application Circuit 2.

Please note that the following precautions.

• Input the same clock to both ICs' timing generator clock input pins CLK_IN and CLK_IN/. To be concrete,

connect one CLK_OUT and CLK_OUT/ to both ICs' CLK_IN and CLK_IN/. At this time, the other CLK_OUT

and CLK_OUT/ are not used, but be sure to input the same clock to MCLK and MCLK/ inputs.

• Connect both ICs' SH_INs to only one ICs' INV_OUT. At that time, connect the other ICs' VIDEO_IN and

OFFSET to 5V. In the same way, connect the other ICs' SID_IN and SID_OFST to 5V.

• When only one IC is used for all of INVET_AMP, SID and VCOM, the FRP input on the other IC does not

have to be at the timing in the above paragraph, but can be connected to GND.

• Short ENB, PRG, POS_CNT1, POS_CNT2, DIR_CNT, INV_CNT and DLY_CNT at both ICs, and apply the

same signals.

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