CXA2112R Ver la hoja de datos (PDF) - Sony Semiconductor

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componentes Descripción

Fabricante

CXA2112R

LCD Driver

Sony Semiconductor 

CXA2112R

4. De-Multiplexer

SH_IN (Pin 45) input is de-multiplexed in order from SH_OUT1 (Pin 31) to SH_OUT6 (Pin 17) according to

internal timing generator setting, and then is output.

Output phase is made simultaneous by the 3-stage sample-and-hold circuit.

The waveform example below shows this operation for forward scan, 6-output de-multiplexing.

SH_IN

CLK_IN

A

D

G

C

F

H

J

B

E

I

K

L

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

SH_OUT1

A

G

0V

SH_OUT2

0V

SH_OUT3

0V

SH_OUT4

H

B

C

I

D

J

0V

SH_OUT5

0V

SH_OUT6

0V

K

E

F

L

Depending on the operation mode setting, scan direction (SH_OUT1 → SH_OUT6 and SH_OUT6 →

SH_OUT1), number of outputs (6-output/12-output) and sample-and-hold position (output phase) can be

changed.

– 14 –

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