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74ALVCH16823 Datasheet PDF : 18 Pages
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Nexperia
74ALVCH16823
18-bit bus-interface D-type flip-flop with reset and enable; 3-state
Symbol Parameter
IBHL
bus hold LOW
current
IBHH
bus hold HIGH
current
IBHLO
bus hold LOW
overdrive current
IBHHO bus hold HIGH
overdrive current
CI
input capacitance
Conditions
VCC = 2.3 V; VI = 0.7 V
VCC = 3.0 V; VI = 0.8 V
VCC = 2.3 V; VI = 1.7 V
VCC = 3.0 V; VI = 2.0 V
VCC = 2.7 V
VCC = 3.0 V
VCC = 2.7 V
VCC = 3.6 V
[1] All typical values are measured at Tamb = 25 °C.
Min
45
75
-45
-75
300
450
-300
-450
-
Typ[1]
-
150
-
-175
-
-
-
-
5.0
Max Unit
-
μA
-
μA
-
μA
-
μA
-
μA
-
μA
-
μA
-
μA
-
pF
10 Dynamic characteristics
Table 7. Dynamic characteristics
At recommended operating conditions; Tamb = −40 °C to +85 °C; voltages are referenced to GND (ground = 0 V);
for test circuit see Figure 10
Symbol Parameter
Conditions
Min
Typ[1]
Max Unit
tpd
propagation delay nCP to nQn; see Figure 6
[2]
VCC = 1.2 V
-
10.6
-
ns
VCC = 1.8 V
1.5
4.5
7.5 ns
VCC = 2.3 V to 2.7 V
1.0
2.8
4.9 ns
VCC = 2.7 V
1.0
2.7
4.3 ns
VCC = 3.0 V to 3.6 V
nMR to nQn; see Figure 8
1.0
2.5
3.7 ns
VCC = 1.2 V
-
9.9
-
ns
VCC = 1.8 V
1.5
4.6
7.4 ns
VCC = 2.3 V to 2.7 V
1.0
2.9
5.0 ns
VCC = 2.7 V
1.0
3.1
4.6 ns
ten
enable time
VCC = 3.0 V to 3.6 V
nOE to nQn; see Figure 9
1.0
2.6
4.0 ns
[3]
VCC = 1.2 V
-
10.4
-
ns
VCC = 1.8 V
1.5
4.4
7.7 ns
VCC = 2.3 V to 2.7 V
1.0
2.8
5.3 ns
VCC = 2.7 V
1.0
3.1
5.2 ns
VCC = 3.0 V to 3.6 V
1.0
2.5
4.3 ns
74ALVCH16823
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 1 February 2018
© Nexperia B.V. 2018. All rights reserved.
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