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PCA8550 Ver la hoja de datos (PDF) - NXP Semiconductors.

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PCA8550 Datasheet PDF : 23 Pages
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NXP Semiconductors
PCA8550
4-bit multiplexed/1-bit latched 5-bit I2C EEPROM DIP switch
7. Limiting values
Table 5. Limiting values[1] [2]
In accordance with the Absolute Maximum Rating System (IEC 60134).
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
VCC
supply voltage
VI
input voltage
VO
output voltage
Tstg
storage temperature
0.5
[3] 1.5
[3] 0.5
60
Max
+4.6
VCC + 1.5
VCC + 0.5
+150
Unit
V
V
V
C
[1] Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these or any other conditions beyond those indicated under
“recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for
extended periods may affect device reliability.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal
environment can create junction temperatures which are detrimental to reliability. The maximum junction
temperature of this integrated circuit should not exceed 150 C.
[3] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
8. Recommended operating conditions
Table 6.
Symbol
VCC
VPOR
VIL
VIH
VOL
VIL
VIH
IOL
IOH
t/V
Tamb
Operating conditions
Parameter
Conditions
DC supply voltage
power-on reset voltage
LOW-level input voltage
HIGH-level input voltage
LOW-level output voltage
LOW-level input voltage
no load; VI = VDD or
VSS
SCL, SDA; IOL = 3 mA
SCL, SDA; IOL = 3 mA
SCL, SDA; IOL = 3 mA
OVERRIDE_N,
MUX_IN,
MUX_SELECT
HIGH-level input voltage
OVERRIDE_N,
MUX_IN,
MUX_SELECT
LOW-level output current
MUX_OUT
NON_MUXED_OUT
HIGH-level output current
MUX_OUT
NON_MUXED_OUT
input transition rise and fall rate
ambient temperature
operating in free air
Min Max Unit
3.0 3.6 V
-
2.6 V
0.5 +0.9 V
2.7 4.0 V
-
0.4 V
0.5 +0.8 V
2.0 4.0 V
-
2.0 mA
-
2.0 mA
0
10
ns/V
0
+70 C
PCA8550
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 8 April 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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