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KSZ9031RNX(2012) Ver la hoja de datos (PDF) - Micrel

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KSZ9031RNX Datasheet PDF : 75 Pages
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Micrel, Inc.
KSZ9031RNX
Pad Skew (value)
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Delay (ns)
–0.42
–0.36
–0.30
–0.24
–0.18
–0.12
–0.06
No delay adjustment (default value)
+0.06
+0.12
+0.18
+0.24
+0.30
+0.36
+0.42
+0.48
Table 6. Absolute Delay for 4-bit Pad Skew Setting
When computing the RGMII timing relationships, delays along the entire data path must be aggregated to determine the
total delay to be used for comparison between RGMII pins within their respective timing group. For the transmit data path,
total delay includes MAC output delay, MAC-to-PHY PCB routing delay, and PHY (KSZ9031RNX) input delay and skew
setting (if any). For the receive data path, the total delay includes PHY (KSZ9031RNX) output delay, PHY-to-MAC PCB
routing delay, and MAC input delay and skew setting (if any).
After power-up or reset, the KSZ9031RNX defaults to the following timings at its RGMII I/O pins to support on-chip data-
to-clock skew timing according to the RGMII Version 2.0 Specification:
Transmit Inputs:
GTX_CLK clock is in sync within ±500ps of TX_EN and TXD[3:0]
Receive outputs:
RX_CLK is delayed about 1.2ns with respect to RX_DV and RXD[3:0]
The above default RGMII timings imply:
RX_CLK clock skew is set by the KSZ9031RNX default register settings.
GTX_CLK clock skew is provided by the MAC.
No PCB delay is required for GTX_CLK and RX_CLK clocks.
The following examples show how to read/write to MMD Address 2h, Register 8h for the RGMII GTX_CLK and RX_CLK
skew settings. MMD register access is through the direct portal registers Dh and Eh. For more programming details, refer
to the “MMD Registers – Descriptions” section.
Read back value of MMD Address 2h, Register 8h.
- Write register 0xD = 0x0002 // Select MMD Device Address 2h
- Write register 0xE = 0x0008 // Select register 8h of MMD Device Address 2h
- Write register 0xD = 0x4002 // Select register data for MMD Device Address 2h, register 8h
- Read register 0xE
// Read value of MMD Device Address 2h, Register 8h
October 2012
26
M9999-103112-1.0

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