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ICL7662 Ver la hoja de datos (PDF) - Renesas Electronics

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componentes Descripción
Fabricante
ICL7662
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ICL7662 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
ICL7662
8
S1
VIN
3
S3
2
S2
C1
S4
4
3
C2
VOUT = -VIN
5
7
FIGURE 15. IDEALIZED NEGATIVE CONVERTER
Theoretical Power Efficiency
Considerations
In theory a voltage multiplier can approach 100% efficiency if
certain conditions are met:
1. The drive circuitry consumes minimal power.
2. The output switches have extremely low ON resistance and
virtually no offset.
3. The impedances of the pump and reservoir capacitors are
negligible at the pump frequency.
The ICL7662 approaches these conditions for negative voltage
multiplication if large values of C1 and C2 are used. ENERGY
IS LOST ONLY IN THE TRANSFER OF CHARGE BETWEEN
CAPACITORS IF A CHANGE IN VOLTAGE OCCURS. The
energy lost is defined by:
E = 1/2C1 (V12 - V22)
where V1 and V2 are the voltages on C1 during the pump and
transfer cycles. If the impedances of C1 and C2 are relatively
high at the pump frequency (refer to Figure 15) compared to
the value of RL, there will be a substantial difference in the
voltages V1 and V2. Therefore it is not only desirable to make
C2 as large as possible to eliminate output voltage ripple, but
also to employ a correspondingly large value for C1 in order to
achieve maximum efficiency of operation.
Do’s and Don’ts
1. Do not exceed maximum supply voltages.
2. Do not connect LV terminal to GROUND for supply voltages
greater than 10V.
3. When using polarized capacitors, the + terminal of C1 must
be connected to pin 2 of the ICL7662 and the + terminal of
C2 must be connected to GROUND.
4. If the voltage supply driving the 7662 has a large source im-
pedance (25- 30), then a 2.2F capacitor from pin 8 to
ground may be required to limit rate of rise of input voltage
to less than 2V/s.
5. User should insure that the output (pin 5) does not go more
positive than GND (pin 3). Device latch up will occur under
these conditions.
A 1N914 or similar diode placed in parallel with C2 will prevent
the device from latching up under these conditions. (Anode pin
5, Cathode pin 3).
Typical Applications
Simple Negative Voltage Converter
The majority of applications will undoubtedly utilize the
ICL7662 for generation of negative supply voltages. Figure 16
shows typical connections to provide a negative supply where
a positive supply of +4.5V to 20.0V is available. Keep in mind
that pin 6 (LV) is tied to the supply negative (GND) for supply
voltages below 10V.
The output characteristics of the circuit in Figure 16A can be
approximated by an ideal voltage source in series with a
resistance as shown in Figure 16B. The voltage source has a
value of -(V+). The output impedance (RO) is a function of the
ON resistance of the internal MOS switches (shown in Figure
2), the switching frequency, the value of C1 and C2, and the
ESR (equivalent series resistance) of C1 and C2. A good first
order approximation for RO is:
RO 2(RSW1 + RSW3 + ESRC1)
1
+ 2(RSW2 + RSW4 + ESRC1) + fPUMP x C1 + ESRC2
(fPUMP =
fOSC ,
2
RSWX = MOSFET switch resistance)
Combining the four RSWX terms as RSW, we see that
1
RO 2 x RSW + fPUMP x C1 + 4 x ESRC1 + ESRC2
RSW, the total switch resistance, is a function of supply voltage
and temperature (See the Output Source Resistance graphs),
typically 24at +25oC and 15V, and 53at +25oC and 5V.
Careful selection of C1 and C2 will reduce the remaining terms,
minimizing the output impedance. High value capacitors will
reduce the 1/(fPUMP x C1) component, and low FSR
capacitors will lower the ESR term. Increasing the oscillator
frequency will reduce the 1/(fPUMP x C1) term, but may have
the side effect of a net increase in output impedance when C1
> 10F and there is no longer enough time to fully charge the
capacitors every cycle. In a typical application where fOSC =
10kHz and C = C1 = C2 = 10F:
1
RO 2 x 23 + (5 x 103 x 10 x 10-6) + 4 ESRC1 + ESRC2
RO 46 + 20 + 5 x ESRC
Since the ESRs of the capacitors are reflected in the output
impedance multiplied by a factor of 5, a high value could
potentially swamp out a low 1/(fPUMP x C1) term, rendering an
increase in switching frequency or filter capacitance ineffective.
Typical electrolytic capacitors may have ESRs as high as 10.
FN3181 Rev.4.00
Jan 9, 2006
Page 7 of 11

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