X5328PI-2.7A Ver la hoja de datos (PDF) - Renesas Electronics

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X5328PI-2.7A

CPU Supervisor with 32Kbit SPI EEPROM

Renesas Electronics 

DATASHEET

X5328, X5329 (Replaces X25328, X25329)

CPU Supervisor with 32Kbit SPI EEPROM

FN8132

Rev 2.00

October 16, 2015

FEATURES

• Low VCC detection and reset assertion

—Five standard reset threshold voltages

—Re-program low VCC reset threshold voltage

using special programming sequence

—Reset signal valid to VCC = 1V

• Long battery life with low power consumption

—<1µA max standby current

—<400µA max active current during read

• 32Kbits of EEPROM

• Built-in inadvertent write protection

—Power-up/power-down protection circuitry

—Protect 0, 1/4, 1/2 or all of EEPROM array with

Block Lock™ protection

—In circuit programmable ROM mode

• 2MHz SPI interface modes (0,0 & 1,1)

• Minimize EEPROM programming time

—32-byte page write mode

—Self-timed write cycle

—5ms write cycle time (typical)

• 2.7V to 5.5V and 4.5V to 5.5V power supply

operation

• Available packages

—14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP

• Pb-free plus anneal available (RoHS compliant)

BLOCK DIAGRAM

DESCRIPTION

These devices combine three popular functions, Power-

on Reset Control, Supply Voltage Supervision, and Block

Lock Protect Serial EEPROM Memory in one package.

This combination lowers system cost, reduces board

space requirements, and increases reliability.

Applying power to the device activates the power-on

reset circuit which holds RESET/RESET active for a

period of time. This allows the power supply and oscilla-

tor to stabilize before the processor can execute code.

The device’s low VCC detection circuitry protects the

user’s system from low voltage conditions by holding

RESET/RESET active when VCC falls below a mini-

mum VCC trip point. RESET/RESET remains asserted

until VCC returns to proper operating level and stabi-

lizes. Five industry standard VTRIP thresholds are

available, however, Intersil’s unique circuits allow the

threshold to be reprogrammed to meet custom

requirements or to fine-tune the threshold in applica-

tions requiring higher precision.

WP

SI

SO

SCK

CS

Data

Register

Command

Decode &

Control

Logic

Protect Logic

Status

Register

8Kbits

8Kbits

16Kbits

VCC

+

VTRIP

-

Reset

Timebase

Power-on and

Low Voltage

Reset

Generation

RESET/RESET

X5328 = RESET

X5329 = RESET

FN8132 Rev 2.00

October 16, 2015

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