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RTL8111 Ver la hoja de datos (PDF) - Realtek Semiconductor

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RTL8111 Datasheet PDF : 29 Pages
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RTL8111
Datasheet
5. Pin Descriptions
The signal type codes below are used in the following tables:
I: Input
O: Output
T/S: Tri-State bi-directional input/output pin
S/T/S: Sustained Tri-State
O/D: Open Drain
5.1. Power Management/Isolation
Symbol
LANWAKEB
ISOLATEB
Type
O/D
I
Table 1. Power Management/Isolation
Pin No Description
36
Power Management Event: Open drain, active low.
Used to reactivate the PCI Express slot’s main power rails and reference clocks.
Isolate Pin: Active low.
71
Used to isolate the RTL8111 from the PCI Express bus. The RTL8111 will not drive
its PCI Express outputs (excluding LANWAKEB) and will not sample its PCI
Express input as long as the Isolate pin is asserted.
5.2. PCI Express Interface
Symbol
REFCLK_P
REFCLK_N
HSOP
HSON
HSIP
HSIN
PERSTB
Type
I
I
O
O
I
I
I
Table 2. PCI Express Interface
Pin No Description
50
PCI Express Differential Reference Clock Source: 100MHz ± 300ppm.
51
54
PCI Express Transmit Differential Pair.
55
47
PCI Express Receive Differential Pair.
48
PCI Express Reset Signal: Active low.
37
When the PERSTB is asserted at power-on state, the RTL8111 returns to a
pre-defined reset state and is ready for initialization and configuration after
the de-assertion of the PERSTB.
5.3. EEPROM
Symbol
EESK
Type
O
EEDI/AUX
O/I
EEDO
I
EECS
O
Pin No
75
74
72
71
Table 3. EEPROM
Description
Serial data clock.
EEDI: Output to serial data input pin of EEPROM.
AUX: Input pin to detect if Aux. Power exists or not on initial power-on.
This pin should be connected to EEPROM. To support wakeup from ACPI
D3cold or APM power-down, this pin must be pulled high to Aux. Power
via a resistor. If this pin is not pulled high to Aux. Power, the RTL8111
assumes that no Aux. Power exists.
Input from serial data output pin of EEPROM.
EECS: EEPROM chip select.
Integrated Gigabit Ethernet Controller for PCI Express 4
Track ID: JATR-1076-21 Rev. 1.2

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