STK10C68-P30 Ver la hoja de datos (PDF) - Simtek Corporation

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STK10C68-P30

CMOS nvSRAM High Performance 8K x 8 Nonvolatile Static RAM

Simtek Corporation 

STK10C68

NONVOLATILE MEMORY OPERATION

MODE SELECTION

E

W

G

NE

H

X

X

X

L

H

L

H

L

L

X

H

L

H

L

L

L

L

H

L

L

L

L

L

L

H

H

X

MODE

Not Selected

Read RAM

Write RAM

Nonvolatile RECALLn

Nonvolatile STORE

No operation

POWER

Standby

Active

Active

Active

ICC2

Active

STORE CYCLES #1 & #2

SYMBOLS

NO.

#1

#2

Alt.

PARAMETER

(VCC = 5.0V ± 10%)

MIN MAX UNITS

22

tWLQXp

tELQXS

tSTORE

STORE Cycle Time

23

tWLNHq

tELNHS

tWC

STORE Initiation Cycle Time

24

tGHNL

Output Disable Set-up to NE Fall

25

tGHEL

Output Disable Set-up to E Fall

26

tNLWL

tNLEL

NE Set-up

27

tELWL

Chip Enable Set-up

28

tWLEL

Write Enable Set-up

10

ms

25

ns

5

ns

5

ns

5

ns

5

ns

5

ns

Note n: An automatic RECALL also takes place at power up, starting when VCC exceeds 4.0V, and taking tRECALL from the time at which VCC exceeds 4.5V.

VCC must not drop below 4.0V once it has been exceeded for the RECALL to function properly.

Note o: If E is low for any period of time in which W is high while G and NE are low, then a RECALL cycle may be initiated.

Note p: Measured with W and NE both returned high, and G returned low. Note that STORE cycles are inhibited/aborted by VCC < 4.0V (STORE inhibit).

Note q: Once tWC has been satisfied by NE, G, W and E, the STORE cycle is completed automatically. Any of NE, G, W or E may be used to terminate the

STORE initiation cycle.

STORE CYCLE #1: W CONTROLLEDo

NE

G

24

26

tGHNL

tNLWL

W

27

E

tELWL

DQ (Data Out)

HIGH IMPEDANCE

STORE CYCLE #2: E CONTROLLEDo

26

tNLEL

NE

25

tGHEL

G

28

W

tWLEL

E

DQ (Data Out)

HIGH IMPEDANCE

23

tWLNH

22

tWLQX

23

tELNHS

22

tWLQX

4-6

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