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SAF7113H Ver la hoja de datos (PDF) - NXP Semiconductors.

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componentes Descripción
Fabricante
SAF7113H
NXP
NXP Semiconductors. NXP
SAF7113H Datasheet PDF : 75 Pages
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Philips Semiconductors
SAF7113H
9-bit video input processor
Table 3:
Symbol
VPO7 to
VPO4
VSSDE1
LLC
VDDDE1
VPO3 to
VPO0
SDA
SCL
RTCO
RTS0
RTS1
VSSDI
VDDDI
VSSDA
XTAL
XTALI
VDDDA
VDDDE2
VSSDE2
TDO
TCK
TDI
TMS
Pin description…continued
Pin
Type Description
12 to 15 O
digital VPO-bus output signal; higher bits of the 8-bit output bus. The
output data types of the VPO-bus are controlled via I2C-bus registers
LCR2 to LCR24 (see Table 7). If I2C-bus bit VIPB = 1, the higher bits
of the digitized input signal are connected to these outputs,
configured by the I2C-bus control signals MODE3 to MODE0.
16
P
ground 1 or digital supply voltage input E (external pad supply)
17
O line-locked system clock output (27 MHz)
18
P
digital supply voltage E1 (external pad supply 1; 3.3 V)
19 to 22 O
digital VPO-bus output signal; lower bits of the 8-bit output bus. The
output data types of the VPO-bus are controlled via I2C-bus registers
LCR2 to LCR24 (see Table 7). If I2C-bus bit VIPB = 1, the lower bits
of the digitized input signal are connected to these outputs,
configured by the I2C-bus control signals MODE3 to MODE0.
23
I/O serial data input/output (I2C-bus)
24
I(/O) serial clock input (I2C-bus) with inactive output path
25
(I/)O real-time control output; contains information about actual system
clock frequency, field rate, odd/even sequence, decoder status,
subcarrier frequency and phase and PAL sequence (see external
document “RTC Functional Description”, available on request); the
RTCO pin is enabled via I2C-bus bit OERT.
Remark: this pin is also used as an input pin for test purposes and
has an internal pull-down resistor; do not connect any pull-up resistor
to this pin
26
(I/)O real-time signal output 0: multifunctional output, controlled by I2C-bus
bits RTSE03 to RTSE00 (see Table 50). RTS0 is strapped during
power-on or CE driven reset, defines which I2C-bus slave address is
used; LOW = 48h for write, 49h for read, external pull-down resistor
of 3.3 kis needed and HIGH = 4Ah for write, 4Bh for read, default
slave address (default, internal pull-up).
27
I/O real-time signal I/O terminal 1: multifunctional output, controlled by
I2C-bus bit RTSE13 to RTSE10 (see Table 51)
28
P
ground for internal digital core supply
29
P
internal core supply (3.3 V)
30
P
digital ground for internal crystal oscillator
31
O second terminal of crystal oscillator; not connected if external clock
signal is used
32
I
input terminal for crystal oscillator or connection of external oscillator
with CMOS compatible square wave clock signal
33
P
digital positive supply voltage for internal crystal oscillator (3.3 V)
34
P
digital supply voltage E2 (external pad supply 2; 3.3 V)
35
P
ground 2 for digital supply voltage input E (external pad supply)
36
O test data output for boundary scan test; see Table note 3
37
I
test clock input for boundary scan test; see Table note 3
38
I
test data input for boundary scan test; see Table note 3
39
I
test mode select input for boundary scan test or scan test; see Table
note 3
9397 750 14231
Product data sheet
Rev. 03 — 9 May 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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