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SAF7113H

9-bit video input processor

NXP Semiconductors. 

SAF7113H

9-bit video input processor

Rev. 03 — 9 May 2005

Product data sheet

1. General description

The 9-bit video input processor is a combination of a two-channel analog preprocessing

circuit including source selection, anti-aliasing filter and ADC, an automatic clamp and

gain control, a Clock Generation Circuit (CGC), a digital multistandard decoder

(PAL BGHI, PAL M, PAL N, combination PAL N, NTSC M, NTSC-Japan, NTSC N and

SECAM), a brightness, contrast and saturation control circuit, a multistandard VBI data

slicer and a 27 MHz VBI data bypass.

The pure 3.3 V CMOS circuit SAF7113H, analog front-end and digital video decoder, is a

highly integrated circuit for desktop video applications. The decoder is based on the

principle of line-locked clock decoding and is able to decode the color of PAL, SECAM and

NTSC signals into ITU-R BT 601 compatible color component values. The SAF7113H

accepts as analog inputs CVBS or S-video (Y/C) from TV or VTR sources. The circuit is

I2C-bus controlled.

The integrated high performance multistandard data slicer supports several VBI data

standards:

• Teletext 625 lines: WST (World Standard Teletext) and CCST (Chinese teletext)

• Teletext 525 lines: US-WST, NABTS (North-American Broadcast Text System) and

MOJI (Japanese teletext)

• Closed caption: Europe and US (line 21)

• Wide Screen Signalling (WSS)

• Video Programming Signal (VPS)

• Time codes (VITC EBU/SMPTE)

• High-speed VBI data bypass for Intercast application.

2. Features

s Four analog inputs, internal analog source selectors, e.g. 4 × CVBS or 2 × Y/C or

(1 × Y/C and 2 × CVBS)

s Two analog preprocessing channels in differential CMOS style for best

S/N-performance

s Fully programmable static gain or automatic gain control for the selected CVBS or Y/C

channel

s Switchable white peak control

s Two built-in analog anti-aliasing filters

s Two 9-bit video CMOS Analog-to-Digital Converters (ADCs), digitized CVBS or

Y/C-signals are available on the VPO-port via I2C-bus control

s On-chip clock generator

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