CL7128E Ver la hoja de datos (PDF) - Clear Logic
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CL7128E Datasheet PDF : 16 Pages
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CL7128E and CL7128S Laser Processed Logic Devices
Block Diagram
u AN-12: CL7000 LPLD Timing and Function Compatability.
This document shows how a seamless conversion from CPLD
to ASIC can be achieve with no additional engineering with
Clear Logic.
INPUT/GCLK1
INPUT/OE2/GCLK2
INPUT/OE1
INPUT/GCLRn
6 to 16 I/O Pins
6 to 16 I/O Pins
6 to 16 I/O Pins
6 to 16 I/O Pins
6 Output Enables
6 to 16
Block A
I/O
6 to 16
Macrocells
36
Control
1 - 16
Block
16
6
6 to 16
I/O
Control
Block
6 to 16
6 to 16
Block C
Macrocells
36
33 - 48
16
6
6 to 16
I/O
Control
Block
6 to 16
6 to 16
Block E
Macrocells
36
65 - 80
16
6
6 to 16
I/O
Control
Block
6 to 16
6 to 16
Block G
Macrocells
36
97 - 112
16
6 to 16
6 Output Enables
Block B 6 to 16
36
Macrocells
17 - 32
16
6 to 16 I/O
Control
Block
6 to 16 I/O Pins
6 to 16
6
Block D 6 to 16
36
Macrocells
49 - 64
16
6 to 16 I/O
Control
Block
6 to 16 I/O Pins
6 to 16
6
Block F 6 to 16
36
Macrocells
81 - 96
16
6 to 16 I/O
Control
Block
6 to 16 I/O Pins
6 to 16
6
Block H 6 to 16
36
Macrocells
6 to 16
I/O
113 - 128
Control
Block
16
6 to 16 I/O Pins
6 to 16
7128 drw 01
Page 3
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