NE555N Ver la hoja de datos (PDF) - Fairchild Semiconductor

Número de pieza

componentes Descripción

Fabricante

NE555N

Single Timer

Fairchild Semiconductor 

LM555/NE555/SA555

Figure 7. Waveforms of Astable Operation

An astable timer operation is achieved by adding resistor RB to Figure 1 and configuring as shown on Figure 5. In the astable

operation, the trigger terminal and the threshold terminal are connected so that a self-trigger is formed, operating as a multi

vibrator. When the timer output is high, its internal discharging Tr. turns off and the VC1 increases by exponential

function with the time constant (RA+RB)*C.

When the VC1, or the threshold voltage, reaches 2Vcc/3, the comparator output on the trigger terminal becomes high,

resetting the F/F and causing the timer output to become low. This in turn turns on the discharging Tr. and the C1 discharges

through the discharging channel formed by RB and the discharging Tr. When the VC1 falls below Vcc/3, the comparator

output on the trigger terminal becomes high and the timer output becomes high again. The discharging Tr. turns off and the

VC1 rises again.

In the above process, the section where the timer output is high is the time it takes for the VC1 to rise from Vcc/3 to 2Vcc/3,

and the section where the timer output is low is the time it takes for the VC1 to drop from 2Vcc/3 to Vcc/3. When timer output

is high, the equivalent circuit for charging capacitor C1 is as follows:

RA

RB

Vcc

C1 Vc1(0-)=Vcc/3

C1

d----v---c----1--

dt

=

V-----c---c-----–----V----(---0-------)

RA + RB

(1)

VC1(0+) = VCC ⁄ 3

(2)

VC1(t)

=





VC C  1

–

2--

3



-–



e

(---R-----A-----+-----Rt----B-----)--C-----1--





(3)





Since the duration of the timer output high state(tH) is the amount of time it takes for the VC1(t) to reach 2Vcc/3,

6

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