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LM317M_99

Three-Termlnal Adjustable Output Posltlve Voltage Regulator

ON Semiconductor 

LM317M

Figure 1. Line Regulation and ∆IAdj/Line Test Circuit

VCC

*

Line Regulation (%/V) =

VOH – VOL

VOL

x 100

VIH

VIL Vin

Vout

LM317M

VOH

VOL

Adjust

R1

240

1%

+

RL

Cin 0.1µF

IAdj

CO 1.0µF

* Pulse Testing Required:

R2

1% Duty Cycle is suggested.

1%

Vin

Vin

Cin 0.1µF

Figure 2. Load Regulation and ∆IAdj/Load Test Circuit

Load Regulation (mV) = VO (min Load) –VO (max Load)

VO (min Load) – VO (max Load)

Load Regulation (% VO) =

VO (min Load)

X 100

Vout

LM317M

IL

VO (min Load)

VO (max Load)

Adjust

IAdj

R1

240

1%

+

CO 1.0µF

RL

(max Load)

*

RL

(min Load)

R2

1%

* Pulse Testing Required:

1% Duty Cycle is suggested.

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