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MK2771-15

VCXO AND SET-TOP CLOCK SOURCE

Integrated Device Technology 

MK2771-15

VCXO AND SET-TOP CLOCK SOURCE

Pin Assignment

PCS0

1

X2

2

X1 3

VDD 4

VDD 5

VIN 6

VDDIO

7

VDD 8

SC 9

GND

10

PCLK1 11

PCLK2

12

PCS1 13

ACLK 14

28

ACS1

27

ACS0

26

54M

25

27M

24

GND

23

CCLK1

22

VDD

21

VDD

20

PCS2

19

GND

18

GND

17

CCLK2

16

13.5M

15

DC

VCXO AND SYNTHESIZER

Processor Clock Select Table (MHz)

PCS2 PCS1 PCS0

0

0

0

0

0

1

0

1

0

0

1

1

1

0

0

1

0

1

1

1

0

1

1

1

PCLK1

27.500

33.333

33.326

50.000

32.400

40.000

TEST

TEST

PCLK2

OFF

66.666

83.314

100.000

81.000

33.333

TEST

TEST

Audio Clock Table

ACS1

0

0

1

1

ACS0

0

1

0

1

ACLK (MHz)

8.192

11.2896

12.288

18.432

Comm Clock Table (MHz)

SC

CCLK1

CCLK2

0

18.432

24.576

M

11.0592

18.432

1

11.0592

24.576

0 = connect directly to ground

1 = connect directly to VDDIO

M = leave floating or unconnected

IDT™ VCXO AND SET-TOP CLOCK SOURCE

2

MK2771-15 REV G 122109

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