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RD28F1602C3B110_03

3 Volt Intel® Advanced+ Boot Block Flash Memory(C3) Stacked-Chip Scale Package Family

Intel 

3 Volt Intel® Advanced+ Boot Block Flash Memory Stacked-CSP Family

Table 2. 3 Volt Intel® Advanced+ Boot Block Stacked-CSP Ball Descriptions (Sheet 2 of 2)

Symbol

F-WP#

F-VCC

F-VCCQ

S-VCC

F-VPP

F-VSS

S-VSS

NC

Type

INPUT

SUPPLY

SUPPLY

SUPPLY

INPUT /

SUPPLY

SUPPLY

SUPPLY

Name and Function

FLASH WRITE PROTECT: Controls the lock-down function of the flexible Locking feature.

When F-WP# is a logic low, the lock-down mechanism is enabled and blocks marked lock-

down cannot be unlocked through software.

When F-WP# is logic high, the lock-down mechanism is disabled and blocks previously

locked-down are now locked and can be unlocked and locked through software. After F-WP# goes

low, any blocks previously marked lock-down revert to that state.

See Section 7.0, “System Design Considerations” on page 41 for details on block locking.

FLASH POWER SUPPLY: [2.7 V–3.3 V] Supplies power for device core operations.

FLASH I/O POWER SUPPLY: [2.7 V–3.3 V] Supplies power for device I/O operations.

SRAM POWER SUPPLY: [2.7 V–3.3 V] Supplies power for device operations.

See Section 7.2.2, “F-VCC, F-VPP and F-RP# Transition” on page 42 for details of power

connections.

FLASH PROGRAM/ERASE POWER SUPPLY: [1.65 V–3.3 V or 11.4 V–12.6 V] Operates as an

input at logic levels to control complete flash protection. Supplies power for accelerated flash

program and erase operations in 12 V ± 5% range. This ball cannot be left floating.

Lower F-VPP ≤ VPPLK, to protect all contents against Program and Erase commands.

Set F-VPP = F-VCC for in-system read, program and erase operations. In this configuration,

F-VPP can drop as low as 1.65 V to allow for resistor or diode drop from the system supply. Note

that if F-VPP is driven by a logic signal, VIH = 1.65 V. That is, F-VPP must remain above 1.65 V to

perform in-system flash modifications.

Raise F-VPP to 12 V ± 5% for faster program and erase in a production environment. Applying

12 V ± 5% to F-VPP can only be done for a maximum of 1000 cycles on the main blocks and 2500

cycles on the parameter blocks. F-VPP may be connected to 12 V for a total of 80 hours maximum.

FLASH GROUND: For all internal circuitry. All ground inputs must be connected.

SRAM GROUND: For all internal circuitry. All ground inputs must be connected.

NOT CONNECTED: Internally disconnected within the device.

10

Datasheet

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