74LVC374ADB,112 Ver la hoja de datos (PDF) - NXP Semiconductors.
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74LVC374ADB,112
NXP Semiconductors.
74LVC374ADB,112 Datasheet PDF : 19 Pages
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NXP Semiconductors
74LVC374A
Octal D-type flip-flop; 5 V tolerant inputs/outputs; positive-edge trigger; 3-state
5. Pinning information
5.1 Pinning
OE 1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 VCC
19 Q7
18 D7
17 D6
16 Q6
374
15 Q5
14 D5
13 D4
12 Q4
11 CP
001aad040
Fig 5. Pin configuration for SO20 and (T)SSOP20
terminal 1
index area
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
374
GND(1)
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
001aad088
Transparent top view
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 6. Pin configuration for DHVQFN20
5.2 Pin description
Table 2.
Symbol
1
Q[0:7]
D[0:7]
10
11
20
Pin description
Pin
OE
2, 5, 6, 9, 12, 15, 16, 19
3, 4, 7, 8, 13, 14, 17, 18
GND
CP
VCC
Description
output enable input (active LOW)
3-state flip-flop output
data input
ground (0 V)
clock input (LOW-to-HIGH, edge-triggered)
supply voltage
74LVC374A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 6 December 2012
© NXP B.V. 2012. All rights reserved.
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