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ICS9112M-16-T Ver la hoja de datos (PDF) - Integrated Circuit Systems

Número de pieza
componentes Descripción
Fabricante
ICS9112M-16-T
ICST
Integrated Circuit Systems ICST
ICS9112M-16-T Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
ICS9112-16
Switching Characteristics
PARAMETER
Output period
SYMBOL
CONDITION
t1
With CL=30pF
Input period
t1
With CL=30pF
Duty Cycle1
Duty Cycle1
Rise Time1
Fall Time1
Delay, REF Rising
Edge to CLKOUT
Rising Edge1, 2
Output to Output
Skew1
Device to Device
Skew1
Cycle to Cycle Jitter1
PLL Lock Time1
Jitter; Absolute Jitter1
Jitter; 1 - Sigma1
Dt1
Measured at 1.4V; CL=30pF
Dt2
Measured at VDD/2 Fout <66.6MHz
tr1
Measured between 0.8V and 2.0V:
CL=30pF
tf1
Measured between 2.0V and 0.8V;
CL=30pF
Dr1
Measured at 1.4V
Tskew All outputs equally loaded, CL=20pF
Tdsk-Tdsk
Tcyc-Tcyc
tLOCK
Tjabs
Tj1s
Measured at VDD/2 on the CLKOUT
pins of devices
Measured at 66.66 MHz, loaded
outputs
Stable power supply, valid clock
presented on REF pin
@ 10,000 cycles
CL=30pF
@ 10,000 cycles
CL=30pF
MIN
40.00
(25)
40.00
(25)
40.0
45
-100
Notes:
1. Guaranteed by design and characterization. Not subject to 100% test.
2. REF input has a threshold voltage of 1.4V
3. All parameters expected with loaded outputs
TYP
MAX
UNITS
10
(133)
10
(133)
ns
(MHz)
ns
(MHz)
50
60
%
50
55
%
1.2
1.5
ns
1.2
1.5
ns
0
±350
ps
250
ps
0
700
ps
200
ps
1.0
ms
70
100
ps
14
30
ps
4

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