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MPC8541EPXAJF

PowerQUICC™ III Integrated Communications Processor Hardware Specification

Freescale Semiconductor 

Document Revision History

18 Document Revision History

Table 51 provides a revision history for this hardware specification.

Table 51. Document Revision History

Rev. No.

4.2

4.1

4

3.2

3.1

3

2

1

0

Date

Substantive Change(s)

1/2008 Added “Note: Rise/Fall Time on CPM Input Pins” and following note text to Section 10.2, “CPM AC

Timing Specifications.”

07/2007 Inserted Figure 3, ““Maximum AC Waveforms on PCI interface for 3.3-V Signaling.”

12/2006 Updated Section 2.1.2, “Power Sequencing.”

Updated back page information.

11/2006 Updated Section 2.1.2, “Power Sequencing.”

Replaced Section 17.8, “JTAG Configuration Signals.”

10/2005

Table 4: Added footnote 2 about junction temperature.

Table 4: Added max. power values for 1000 MHz core frequency.

Removed Figure 3, “Maximum AC Waveforms on PCI Interface for 3.3-V Signaling.”

Table 30: Modified note to tLBKSKEW from 8 to 9

Table 30: Changed tLBKHOZ1 and tLBKHOV2 values.

Table 30: Added note 3 to tLBKHOV1.

Table 30 and Table 31: Modified note 3.

Table 31: Added note 3 to tLBKLOV1.

Table 31: Modified values for tLBKHKT, tLBKLOV1, tLBKLOV2, tLBKLOV3, tLBKLOZ1, and tLBKLOZ2.

Figure 21: Changed Input Signals: LAD[0:31]/LDP[0:3].

Table 43: Modified note for signal CLK_OUT.

Table 43: PCI1_CLK and PCI2_CLK changed from I/O to I.

Table 52: Added column for Encryption Acceleration.

8/29/2005 Table 4: Modified max. power values.

Table 43: Modified notes for signals TSEC1_TXD[3:0], TSEC2_TXD[3:0], TRIG_OUT/READY,

MSRCID4, and MDVAL.

8/2005

6/2005

Previous revision’s history listed incorrect cross references. Table 2 is now correctly listed as

Table 27 and Table 31 is now listed as Table 31.

Table 7: Added note 2.

Table 14: Modified min and max values for tDDKHMP

Table 27: Changed LVdd to OVdd for the supply voltage Ethernet management interface.

Table 4: Modified footnote 4 and changed typical power for the 1000MHz core frequency.

Table 31: Corrected symbols for body rows 9–15, effectively changing them from a high state to a

low state.

6/2005 Initial Release.

MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2

Freescale Semiconductor

83

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