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FH8065403552500SR3GQ Datasheet PDF : 745 Pages
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C2000 Product Family—Contents
7.2.2
7.2.3
7.2.4
7.2.5
Warm Reset Sequence .........................................................................139
7.2.2.1 SPD Reset Sequence ...........................................................140
Power-Down to S5 (Soft Off) and Stay There Sequence ............................141
Events While Sleeping in S5 (Soft-Off) State ...........................................141
7.2.4.1 S5 to S0 State....................................................................141
7.2.4.2 S5 to G3 State ...................................................................142
7.2.4.3 SUS Well Power Down Sequence...........................................142
Power-Down from S0 to G3 (Mechanical Off) Sequence ............................143
8 Thermal Management ............................................................................................ 144
8.1 Overview ........................................................................................................144
8.2 Signal Descriptions ..........................................................................................145
8.3 CPU Thermal Management Registers ..................................................................146
8.4 Digital Thermal Sensors (DTS)...........................................................................146
8.5 Thermal Interrupts and Thresholds.....................................................................147
8.5.1 Core Programmable Thresholds .............................................................148
8.5.2 Core HOT Threshold.............................................................................148
8.5.3 Core Out of Specification Threshold .......................................................148
8.5.4 Uncore Programmable Thresholds..........................................................149
8.5.4.1 Aux3 Trip...........................................................................149
8.5.4.2 Aux2, Aux1, Aux0Trip..........................................................149
8.5.5 PROCHOT_B .......................................................................................149
8.5.6 MEMHOT_B ........................................................................................149
8.5.7 THERMTRIP_N Signal ...........................................................................149
8.6 Processor Thermal Control Circuit (TCC) Mechanisms............................................150
8.6.1 Clock Modulation (Intel® Thermal Monitor 1)...........................................150
8.6.2 Core Frequency/Voltage Reduction (Intel® Thermal Monitor 2) ..................150
8.6.3 Thermal Status ...................................................................................150
8.7 Memory Thermal Control ..................................................................................151
8.7.1 Memory Bandwidth Counter ..................................................................151
8.7.2 Memory Temperature Monitoring ...........................................................151
9 Power Management ............................................................................................... 152
9.1 Overview ........................................................................................................152
9.2 Signal Descriptions ..........................................................................................153
9.3 Power Management Features.............................................................................154
9.4 Internal Power Wells ........................................................................................155
9.4.1 Core Power Well ..................................................................................155
9.4.2 SUS Power Well ..................................................................................155
9.4.3 RTC Power Well...................................................................................155
9.5 Supply Voltage Rails.........................................................................................156
9.6 Serial Voltage Identification (sVID) Controller ......................................................157
9.6.1 SVID VR Requirements ........................................................................157
9.6.1.1 SVID Controller Addressing Requirements ..............................157
9.6.2 Command Byte Encoding......................................................................157
9.6.2.1 sVID Commands .................................................................157
9.7 Active State Power Management Overview ..........................................................159
9.8 System Global Power States ..............................................................................160
9.8.1 Low-Power S0 Idle ..............................................................................162
9.9 Processor Power States - C-States .....................................................................163
9.10 Performance States..........................................................................................165
9.10.1 Processor Performance States - P-States ................................................165
9.10.1.1 Frequency/Voltage Scaling ...................................................165
9.10.2 Software P-State Requests ...................................................................166
9.10.2.1 Windows 7: P-State Transitions with ACNT/MCNT ....................166
9.11 Power Management Technologies .......................................................................167
Intel® Atom™ Processor C2000 Product Family for Microserver
Datasheet
6
January 2016
Order Number: 330061-003US
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