ACPL-054L Ver la hoja de datos (PDF) - Broadcom Corporation
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ACPL-054L Datasheet PDF : 18 Pages
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ACPL-M50L, ACPL-054L, ACPL-W50L, ACPL-K54L
Data Sheet
Switching Specifications (ACPL-M50L)
Over recommended operating (TA = –40°C to 105°C), IF = 3 mA, (2.7V ≤ VCC ≤ 24V), unless otherwise specified.
Table 8 Switching Specifications (ACPL-M50L)
Parameter
Symbol Min Typ Max Units
Test Conditions
Fig.
Propagation Delay
TPHL
—
0.2
0.5
Time to Logic Low at
Output
—
0.2
1
— 0.22 0.5
—
0.22
1
μs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA,
μs
VCC = 3.3V, RL= 1.2 k, CL = 15 pF, VTHHL = 1.5V
μs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA,
μs
VCC = 5.0V, RL = 1.9 k, CL = 15 pF, VTHHL = 1.5V
26
12, 26
26
14, 26
— 0.33 0.7
—
0.33
1.3
μs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA,
μs
VCC = 24V, RL = 10 k, CL = 15 pF, VTHHL = 1.5V
26
16, 26
Propagation Delay
TPLH
—
0.38
0.8
Time to Logic High at
Output
—
0.38
1.2
— 0.31 0.7
—
0.31
1
μs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA,
μs
VCC = 3.3V, RL = 1.2 k, CL = 15 pF, VTHHL = 2.0V
μs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF= 3 mA,
μs
VCC = 5.0V, RL = 1.9 k, CL = 15 pF, VTHHL = 2.0V
26
12, 26
26
14, 26
—
0.3
0.7
μs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA,
26
—
0.3
1
μs
VCC = 24V, RL = 10 k, CL = 15 pF, VTHHL = 2.0V
16, 26
Pulse Width
Distortiona
PWD — 0.18 0.8
μs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA,
26
—
0.18
1.2
μs
VCC = 3.3V, RL = 1.2 k, CL = 15 pF, VTHHL = 1.5V,
26
VTHLH = 2.0V
—
0.1
0.7
μs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA,
26
—
0.1
1
μs
VCC = 5.0V, RL = 1.9 k, CL = 15 pF, VTHHL = 1.5V,
26
VTHLH = 2.0V
—
0.1
0.7
μs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA,
26
—
0.1
1
μs
VCC=24V, RL=10 k, CL=15 pF, VTHHL=1.5V,
26
VTHLH=2.0V
Propagation Delay
tpsk
— 0.18 0.7
μs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA,
Difference Between
Any Two Partsb
VCC = 3.3V, RL = 1.2 k, CL = 15 pF, VTHHL = 1.5V,
VTHLH = 2.0V
—
0.1
0.6
μs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA,
VCC = 5.0V, RL = 1.9 k, CL = 15 pF, VTHHL = 1.5V,
VTHLH = 2.0V
—
0.1
0.6
μs TA = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, IF = 3 mA,
VCC = 24V, RL = 10 k, CL = 15 pF, VTHHL = 2.0V
Common Mode
|CMH| 15
25
— kV/μs TA = 25°C VCM = 1500V, IF = 0 mA,, RL = 1.2 k or 1.9 k,
27
Transient Immunity at
VCC = 3.3 V or 5V
Logic High Outputc
Common Mode
|CML| 15
20
— kV/μs TA= 25°C VCM = 1500V, IF = 3 mA, RL = 1.2 k, VCC = 5V
27
Transient Immunity at
Logic Low Outputd
10
15
— kV/μs
VCM = 1500V, IF = 3 mA, RL = 1.2 k, VCC = 3.3 V
27
a. Pulse Width Distortion (PWD) is defined as |tPHL – tPLH| for any given device.
b. The difference between tPLH and tPHL between any two parts under the same test condition. (See IPM Dead Time and Propagation Delay Specifications section.)
c. Common transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the common mode pulse, VCM, to assure
that the output will remain in a Logic High state (i.e., VO > 2.0V).
d. Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dVCM/dt on the falling edge of the common mode pulse signal,
VCM to assure that the output will remain in a Logic Low state (i.e., VO < 0.8V).
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