6B259
8-BIT ADDRESSABLE
DMOS POWER DRIVER
RECOMMENDED OPERATING CONDITIONS
over operating temperature range
Logic Supply Voltage Range, VDD ............... 4.5 V to 5.5 V
High-Level Input Voltage, VIH ............................ ≥ 0.85VDD
Low-level input voltage, VIL ................................. ≤0.15VDD
ELECTRICAL CHARACTERISTICS at TA = +25°C, VDD = 5 V, tir = tif ≤ 10 ns (unless otherwise
specified).
Characteristic
Logic Supply Voltage
Output Breakdown
Voltage
Symbol
VDD
V(BR)DSX
Test Conditions
Operating
IO = 1 mA
Min.
4.5
50
Limits
Typ.
Max.
5.0
5.5
—
—
Units
V
V
Off-State Output
Current
IDSX
VO = 40 V, VDD = 5.5 V
VO = 40 V, VDD = 5.5 V, TA = 125°C
—
0.1
5.0
µA
—
0.15
8.0
µA
Static Drain-Source
rDS(on) IO = 100 mA, VDD = 4.5 V
—
4.2
5.7
Ω
On-State Resistance
IO = 100 mA, VDD = 4.5 V, TA = 125°C
—
6.8
9.5
Ω
IO = 350 mA, VDD = 4.5 V (see note)
—
5.5
8.0
Ω
Nominal Output
Current
ION
VDS(on) = 0.5 V, TA = 85°C
—
90
—
mA
Logic Input Current
Prop. Delay Time
Output Rise Time
IIH
VI = VDD = 5.5 V
IIL
VI = 0, VDD = 5.5 V
tPLH
IO = 100 mA, CL = 30 pF
tPHL
IO = 100 mA, CL = 30 pF
tr
IO = 100 mA, CL = 30 pF
—
—
1.0
µA
—
—
-1.0
µA
—
150
—
ns
—
90
—
ns
—
200
—
ns
Output Fall Time
tf
IO = 100 mA, CL = 30 pF
Supply Current
IDD(OFF) VDD = 5.5 V, Outputs off
IDD(ON) VDD = 5.5 V, Outputs on
Typical Data is at VDD = 5 V and is for design information only.
NOTE — Pulse test, duration ≤100 µs, duty cycle ≤2%.
—
200
—
ns
—
20
100
µA
—
150
300
µA
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000