T35L6432B Ver la hoja de datos (PDF) - Taiwan Memory Technology
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T35L6432B Datasheet PDF : 16 Pages
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T35L6432B
ABSOLUTE MAXIMUM RATINGS*
Voltage on VCC Supply Relative to VSS.
…………-0.5V to +4.6V
I/O Supply Voltage VccQ ........... Vss -0.5V to
Vcc
VIN......................................... -0.5V to Vcc +0.5V
Storage Temperature (plastic)...... -55°C to +150°C
Junction Temperature ..........….................. +150°C
Power Dissipation ........................................ 1.0W
Short Circuit Output Current...................... 100mA
*Stresses greater than those listed under
"Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress
rating only and functional operation of the device
at these or any other conditions above those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for extended
periods may affect reliability.
DC ELECTRICAL CHARACTERISTICS AND RECOMMENDED
OPERATING CONDITIONS
(0°C ≤ Ta ≤ 70°C; VCC = 3.3V (+0.3V/-0.165V) unless otherwise noted)
DESCRIPTION
Input High (Logic)
voltage
Input Low (Logic)
voltage
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
Supply Voltage
CONDITIONS
0V ≤ VIN ≤ VCC
Output(s) disabled, 0V
≤ VOUT≤ VCC
IOH = -4.0 mA
IOL = 8.0 mA
SYM.
VIH
VIL
ILI
ILO
VOH
VOL
Vcc
MIN
MAX
UNITS
2 VCCQ + 0.3 V
-0.3
0.8
V
-2
2
uA
-2
2
uA
2.4
V
0.4
V
3.1
3.6
V
NOTES
1, 2
1, 2
14
1, 11
1, 11
1
MAX.
DESCRIPTION
CONDITIONS
Device selected; all inputs ≤VIL or
Power Supply
Current : Operating
≥ VIH; cycle time ≥tKC MIN; VCC
= MAX; outputs open
SYM. TYP -9 -10 -11 -12 UNITS NOTES
ICC TBD 250 200 150 120 mA 3, 12, 13
Device selected;ADSC ,ADSP ,
Power Supply
Current: Idle
ADV , GW ,BWE ≥ VIH; all other
inputs≤VIL or≥VIH; VCC = MAX;
ISB1
TBD
60
60
60
60
mA
12, 13
cycle time ≥ tKC MIN: outputs open
Device deselected; VCC = MAX; all
CMOS Standby inputs ≤ VSS + 0.2 or ≥ VCC - 0.2;
all inputs static; CLK frequency =0
ISB2 TBD 10 10 10 10 mA 12, 13
TTL Standby
Clock Running
Device deselected; all inputs ≤ VIL
or ≥ VIH; all inputs static; VCC =
MAX;CLK frequency = 0
Device deselected; all inputs ≤ VIL
or ≥ VIH; VCC =MAX; CLK cycle
time ≥ tKCMIN
ISB3 TBD 25 25 25 25 mA 12, 13
ISB4 TBD 60 60 60 60 mA 12, 13
Taiwan Memory Technology, Inc. reserves the right P.8
to change products or specifications without notice.
Publication Date: JUL. 2002
Revision: A
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