INF8574 Ver la hoja de datos (PDF) - IK Semicon Co., Ltd
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Fabricante
INF8574 Datasheet PDF : 11 Pages
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INF8574
PINNING
SYMBOL
PIN
A0
1
A1
2
A2
3
P0
4
P1
5
P2
6
P3
7
VSS
8
P4
9
P5
10
P6
11
P7
12
INT
13
SCL
14
SDA
15
VDD
16
DESCRIPTION
address input 0
address input 1
address input 2
quasi-bidirectional I/O Port 0
quasi-bidirectional I/O Port 1
quasi-bidirectional I/O Port 2
quasi-bidirectional I/O Port 3
supply ground
quasi-bidirectional I/O Port 4
quasi-bidirectional I/O Port 5
quasi-bidirectional I/O Port 6
quasi-bidirectional I/O Port 7
interrupt output (active LOW)
serial clock line
serial data line
supply voltage
CHARACTERISTICS OF THE I2C-BUS
The I2C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial
data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up
resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus is
not busy.
Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the
HIGH period of the clock pulse as changes in the data line at this time will be interpreted as control signals
Bit transfer.
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data
line, while the clock is HIGH is defined as the start condition (S). A LOW-to-HIGH transition of the data
line while the clock is HIGH is defined as the stop condition (P).
Definition of start and stop conditions.
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