MCP6S91 Ver la hoja de datos (PDF) - Microchip Technology

Número de pieza

componentes Descripción

Fabricante

MCP6S91

Single-Ended, Rail-to-Rail I/O, Low-Gain PGA

Microchip Technology 

MCP6S91/2/3

DC CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise indicated, TA = +25°C, VDD = +2.5V to +5.5V, VSS = GND, VREF = VSS, G = +1 V/V,

Input = CH0 = (0.3V)/G, CH1 = 0.3V, RL = 10 kΩ to VDD/2, SI and SCK are tied low and CS is tied high.

Parameters

Sym

Min

Typ

Max

Units

Conditions

Ladder Resistance

Ladder Resistance

Ladder Resistance across

Temperature

RLAD

3.4

4.9

6.4

∆RLAD/∆TA

—

+0.028

—

kΩ

%/°C

(Note 1)

TA = -40°C to +125°C (Note 1)

Amplifier Output

DC Output Non-linearity G = +1

G ≥ +2

Maximum Output Voltage Swing

Short Circuit Current

Power Supply

VONL

VONL

VOH_ANA,

VOL_ANA

ISC

—

—

VSS + 20

VSS + 60

—

±0.18

±0.050

—

—

±25

—

—

VDD – 100

VDD – 60

—

% of FSR

% of FSR

mV

mA

VOUT ≈ 0.3V to VDD − 0.3V, VDD = 5.0V

VOUT ≈ 0.3V to VDD − 0.3V, VDD = 5.0V

G ≥ +2; 0.5V output overdrive

G ≥ +2; 0.5V output overdrive,

VREF = VDD/2

Supply Voltage

VDD

2.5

—

5.5

Minimum Valid Supply Voltage VDD_VAL

—

0.4

2.0

Quiescent Current

IQ

0.4

1.0

1.6

Quiescent Current, Shutdown

IQ_SHDN

—

30

—

Mode

V

V

Register data still valid

mA IO = 0 (Note 3)

pA IO = 0 (Note 3)

Note 1:

2:

3:

RLAD (RF+RG in Figure 4-1) connects VREF, VOUT and the inverting input of the internal amplifier. The MCP6S92 has

VREF tied internally to VSS, so VSS is coupled to the internal amplifier and the PSRR spec describes PSRR+ only. It is

recommended that the MCP6S92’s VSS pin be tied directly to ground to avoid noise problems.

The MCP6S92’s VIVR and VIVR_REF are not tested in production; they are set by design and characterization.

IQ includes current in RLAD (typically 60 µA at VOUT = 0.3V). Both IQ and IQ_SHDN exclude digital switching currents.

 2004 Microchip Technology Inc.

DS21908A-page 3

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