DS1204V Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated

Número de pieza

componentes Descripción

Fabricante

DS1204V

Electronic Key

Dallas Semiconductor -> Maxim Integrated 

FLOW CHART - NORMAL MODE Figure 3

RESET HIGH

WRITE COMMAND PROTOCOL

NO

MATCH

FOR READ OR

WRITE

READ 64 BITS

IDENTIFICATION

WRITE 64 BITS

SECURITY MATCH

NO

MATCH

OUTPUT GARBLED

DATA

READ OR WRITE

128 BITS BASED

ON PROTOCOL

SECURE NV RAM

STOP

RESET LOW

OUTPUT IN HIGH Z

DS1204V

PROGRAM MODE

The block diagram in Figure 4 illustrates the main ele-

ments of the key when used in the program mode. To ini-

tiate the program mode, RST is driven high and 24 bits

are loaded into the command register on each

low-to-high transition of the CLK input. The command

register must match the exact pattern that defines pro-

gram operation. If an exact match is not found, the re-

mainder of the program cycle is ignored. If the command

register is properly loaded, then the 128 bits that follow

are written to the identification memory and the security

match memory. Figure 5 is a summary of program mode

operation and Figure 6 is a flow chart of program mode

operation.

021798 3/10

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