DS1204V Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS1204V

Electronic Key

Dallas Semiconductor -> Maxim Integrated 

DS1204V

NOTES:

1. All voltages are referenced to GND.

2. Measured at VIH = 2.0 or VIL = .8V and 10ns maximum rise and fall time.

3. Measured at VOH = 2.4 volts and VOL = 0.4 volts.

4. For CLK, D/Q, and RST.

5. Load capacitance = 50 pF.

6. Measured with outputs open.

7. Measured at VIH of RST > 3.5V when RST supplies power.

8. Logic 1 maximum is VCC + 0.3 volts if the VCC pin supplies power and RST + 0.3 volts if the RST pin supplies

power.

9. Applies to RST when VCC < 3.5V.

10. Input levels apply to CLK, DQ, and RST while VCC is within nominal limits. When VCC is not connected to the

key, then RST input reverts to VIHE.

11. RST logic 1 maximum is VCC + 0.3 volts if the VCC pin supplies power and 5.5 volts maximum if RST supplies

power.

12. Each DS1204V is marked with a 4-digit code AABB. AA designates the year of manufacture. BB designates

the week of manufacture.

13. Average AC RST current can be determined using the following formula:

ITOTAL = 2 + ILOAD DC + (4 x 10-3) (CL + 140)f

ITOTAL and ILOAD are in mA; CL is in pF; f is in MHz.

Applying the above formula, a load capacitance of 50 pF running at a frequency of 4.0 MHz gives an ITOTAL of

5 mA.

14. When RST is supplying power tCWH must be increased to100 ms average.

021798 10/10

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