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PCF8594C-2W/02-280

256 to 1024×8-bit CMOS EEPROMs with I2C-bus interface

Philips Electronics 

Philips Semiconductors

256 to 1024 × 8-bit CMOS EEPROMs with

I2C-bus interface

Product specification

PCF85xxC-2 family

1 FEATURES

• Low power CMOS:

– maximum operating current:

2.0 mA (PCF8582C-2)

2.5 mA (PCF8594C-2)

4.0 mA (PCF8598C-2)

– maximum standby current 10 µA (at 6.0 V),

typical 4 µA

• Non-volatile storage of:

– 2 kbits organized as 256 × 8-bit (PCF8582C-2)

– 4 kbits organized as 512 × 8-bit (PCF8594C-2)

– 8 kbits organized as 1024 × 8-bit (PCF8598C-2)

• Single supply with full operation down to 2.5 V

• On-chip voltage multiplier

• Serial input/output I2C-bus

• Write operations:

– byte write mode

– 8-byte page write mode

(minimizes total write time per byte)

• Read operations:

– sequential read

– random read

• Internal timer for writing (no external components)

• Power-on-reset

3 QUICK REFERENCE DATA

SYMBOL

VDD

IDDR

PARAMETER

supply voltage

supply current read

IDDW

IDD(stb)

supply current E/W

PCF8582C-2

PCF8594C-2

PCF8598C-2

standby supply current

• High reliability by using a redundant storage code

• Endurance: 1000000 Erase/Write (E/W) cycles at

Tamb = 22 °C

• 10 years non-volatile data retention time

• Pin and address compatible to: PCF8570, PCF8571,

PCF8572 and PCF8581.

2 GENERAL DESCRIPTION

The PCF85xxC-2 is a family of floating gate Electrically

Erasable Programmable Read Only Memories

(EEPROMs) with 2, 4 and 8 kbits (256, 512 and

1024 × 8-bit). By using an internal redundant storage code

it is fault tolerant to single bit errors. This feature

dramatically increases the reliability compared to

conventional EEPROMs. Power consumption is low due to

the full CMOS technology used. The programming voltage

is generated on-chip, using a voltage multiplier.

As data bytes are received and transmitted via the serial

I2C-bus, a package using eight pins is sufficient. Up to

eight PCF85xxC-2 devices may be connected to the

I2C-bus. Chip select is accomplished by three address

inputs (A0, A1 and A2).

Timing of the E/W cycle is carried out internally, thus no

external components are required. Pin 7 (PTC) must be

connected to either VDD or left open-circuit. There is an

option of using an external clock for timing the length of an

E/W cycle.

CONDITIONS

fSCL = 100 kHz

VDD = 2.5 V

VDD = 6 V

fSCL = 100 kHz

VDD = 2.5 V

VDD = 6 V

VDD = 2.5 V

VDD = 6 V

VDD = 2.5 V

VDD = 6 V

VDD = 2.5 V

VDD = 6 V

MIN.

2.5

MAX.

6.0

UNIT

V

−

60

µA

−

200

µA

−

0.6

mA

−

2.0

mA

−

0.8

mA

−

2.5

mA

−

1.0

mA

−

4.0

mA

−

3.5

µA

−

10

µA

1997 Feb 13

3

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