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74LVC1G57-Q100 Ver la hoja de datos (PDF) - NXP Semiconductors.

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74LVC1G57-Q100
NXP
NXP Semiconductors. NXP
74LVC1G57-Q100 Datasheet PDF : 16 Pages
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NXP Semiconductors
74LVC1G57-Q100
Low-power configurable multiple function gate
11. Dynamic characteristics
Table 9. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 11.
Symbol Parameter
Conditions
40 C to +85 C
Min Typ[1] Max
tpd
propagation delay A, B, C to Y; see Figure 10
[2]
VCC = 1.65 V to 1.95 V
1.0
6.0 14.4
VCC = 2.3 V to 2.7 V
0.5
3.5
8.3
VCC = 2.7 V
0.5
4.2
8.5
VCC = 3.0 V to 3.6 V
0.5
3.8
6.3
VCC = 4.5 V to 5.5 V
0.5
3.0
5.1
CPD
power dissipation VCC = 3.3 V; VI = GND to VCC [3] -
22
-
capacitance
40 C to +125 C Unit
Min
Max
1.0
18 ns
0.5
10.4 ns
0.5
10.6 ns
0.5
7.9 ns
0.5
6.4 ns
-
- pF
[1] Typical values are measured at nominal VCC and at Tamb = 25 C.
[2] tpd is the same as tPLH and tPHL
[3] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
12. Waveforms
VI
A, B, C input
VM
VM
GND
VOH
t PHL
t PLH
Y output
VM
VM
VOL
VOH
t PLH
t PHL
Y output
VM
VM
VOL
001aab593
Measurement points are given in Table 10.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 10. Input A, B and C to output Y propagation delay times
74LVC1G57-Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 April 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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