Figure 5. I2C Bus Protocol
M24M01
SCL
SDA
START
Condition
SDA
Input
SDA
Change
STOP
Condition
SCL
SDA
1
2
3
MSB
START
Condition
SCL
SDA
1
2
3
MSB
7
8
9
ACK
7
8
9
ACK
STOP
Condition
AI00792B
Table 3. Operating Modes
Mode
RW bit
Current Address Read
1
0
Random Address Read
1
Sequential Read
1
Byte Write
0
Page Write
0
Note: 1. X = VIH or VIL.
WC 1
X
X
X
X
VIL
VIL
Bytes
1
1
≥1
1
≤ 128
Initial Sequence
START, Device Select, RW = 1
START, Device Select, RW = 0, Address
reSTART, Device Select, RW = 1
Similar to Current or Random Address Read
START, Device Select, RW = 0
START, Device Select, RW = 0
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