HEF4511B Ver la hoja de datos (PDF) - NXP Semiconductors.
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HEF4511B Datasheet PDF : 20 Pages
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HEF4511B
BCD to 7-segment latch/decoder/driver
Rev. 7 — 11 November 2011
Product data sheet
1. General description
The HEF4511B is a BCD to 7-segment latch/decoder/driver with four address inputs
(D0 to D3), an active HIGH latch enable input (LE), an active LOW ripple blanking input
(BL), an active LOW lamp test input (LT), and seven active HIGH NPN bipolar transistor
segment outputs (Qa to Qg).
When LE is LOW and BL is HIGH, the state of the segment outputs (Qa to Qg) is
determined by the data on D0 to D3. When LE goes HIGH, the last data present on D0 to
D3 is stored in the latches and the segment outputs remain unchanged. When LT is LOW,
all of the segment outputs are HIGH independent of all other input conditions. With LT
HIGH, a LOW on BL forces all segment outputs LOW. The inputs LT and BL do not affect
the latch circuit.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from 40 C to +85 C and 40 C to +125 C
Complies with JEDEC standard JESD 13-B
3. Ordering information
Table 1. Ordering information
All types operate from 40 C to +125 C.
Type number
Package
Name
Description
HEF4511BP
DIP16
plastic dual in-line package; 16 leads (300 mil)
HEF4511BT
SO16
plastic small outline package; 16 leads; body width 3.9 mm
Version
SOT38-4
SOT109-1
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