FSQ100 Ver la hoja de datos (PDF) - Fairchild Semiconductor
Número de pieza
componentes Descripción
Fabricante
FSQ100 Datasheet PDF : 12 Pages
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Pin Assignments
GND 1
Vcc 2
Vfb 3
NC 4
8 Drain
7 Drain
6 Drain
5 Vstr
Figure 3. Pin Configuration (Top View)
Pin Definitions
Pin #
1
Name
GND
Description
Ground. SenseFET source terminal on primary side and internal control ground.
Positive Supply Voltage Input. Although connected to an auxiliary transformer winding,
2
Vcc
current is supplied from pin 5 (Vstr) via an internal switch during start-up (see Figure 2). When
VCC reaches the UVLO upper threshold (9V), the internal start-up switch opens and device
power is supplied via the auxiliary transformer winding.
Feedback. Inverting input to the PWM comparator with its normal input level lies between 0.5V
and 2.5V. It has a 0.4mA current source connected internally, while a capacitor and opto-
3
Vfb
coupler are typically connected externally. A feedback voltage of 4.5V triggers overload
protection (OLP). There is a time delay while charging external capacitor Cfb from 3V to 4.5V
using an internal 5µA current source. This time delay prevents false triggering under transient
conditions, but still allows the protection mechanism to operate in true overload conditions.
4
NC
No Connection.
Start-up. This pin connects directly to the rectified AC line voltage source. At start-up, the
5
Vstr
internal switch supplies internal bias and charges an external storage capacitor placed
between the VCC pin and ground. Once the VCC reaches 9V, the internal switch stops charging
the capacitor.
6,7,8
Drain
SenseFET Drain. The drain pins are designed to connect directly to the primary lead of the
transformer and are capable of switching a maximum of 650V. Minimizing the length of the
trace connecting these pins to the transformer decreases leakage inductance.
© 2007 Fairchild Semiconductor Corporation
FSQ100 Rev. 1.0.1
3
www.fairchildsemi.com
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