WT60P1 Ver la hoja de datos (PDF) - Weltrend Semiconductor
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WT60P1 Datasheet PDF : 24 Pages
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WT60P1
Digital Monitor Controller
Ver. 1.51 Jul-31-1998
Port_B :
Pin PB0/HLFO - general purpose I/O pin shared with half frequency output.
Pin PB1/HLFI - general purpose I/O pin shared with half frequency output.
Pin PB2
- general purpose I/O pin.
Pin PB3/PAT - general purpose I/O pin shared with self-test pattern output.
Pin PB4/SCL2 - general purpose I/O pin shared with I2C interface clock pin.
Pin PB5/SDA2 - general purpose I/O pin shared with I2C interface data pin.
Pin PB6/IRQB - general purpose I/O pin shared with interrupt request input.
The source/sink current of port_B is 5mA when as an output. When it is input, an internal pull high
resistor is connected.
Address R/W
0012H W
0013H W
0013H R
Initial
00H
FFH
--
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
0 PB6OE PB5OE PB4OE PB3OE PB2OE PB1OE PB0OE
1 PB6W PB5W PB4W PB3W PB2W PB1W PB0W
-- PB6R PB5R PB4R PB3R PB2R PB1R PB0R
Bit Name
PB6OE - PB0OE
PB6W - PB0W
PB6R- PB0R
Bit value = “1”
Output enable.
Outputs high level (IOH= -5mA).
Pin is high level.
Bit value = “0”
Output disable (internal pull-up).
Outputs low level (IOL= 5mA).
Pin is low level.
* If IEN_D bit in REG#1AH is “1” and PB6OE bit is "0", the PB6 pin becomes interrupt request
input.
* If ENI2C bit in REG#1EH is “1”, the PB5 and PB4 pins becomes I2C interface pins.
* If ENPAT bit in REG#16H is “1”, the PB3 pin becomes self-test pattern output.
* If ENHALF bit in REG#17H is “1”, the PB1 pin becomes half frequency input and PB0 pin becomes
half frequency output pin.
PBnOE
PBnW
PBnR
5mA
5mA
100uA
Structure of Port B
Pin PB0 to PB6
Weltrend Semiconductor, Inc.
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